27.5.63 USBLPMRIS Register (Offset = 0x364) [reset = 0x0]
USB LPM Raw Interrupt Status (USBLPMRIS)
OTG A / Host
OTG B / Device
The USBLPMRIS is a 7 bit register that provides status of the LPM Power state. On reset, all bits in this register are reset to 0. This register is self-clearing on read.
USBLPMRIS for OTG A / Host is shown in Figure 27-75 and described in Table 27-82.
USBLPMRIS for OTG B / Device is shown in Figure 27-76 and described in Table 27-83.
Return to Summary Table.
Figure 27-75 USBLPMRIS Register (OTG A / Host)
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
RESERVED |
ERR |
RES |
NC |
ACK |
NY |
LPMST |
R-0x0 |
R-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
|
Table 27-82 USBLPMRIS Register Field Descriptions (OTG A / Host)
Bit |
Field |
Type |
Reset |
Description |
7-6 |
RESERVED |
R |
0x0 |
|
5 |
ERR |
R |
0x0 |
LPM Error Interrupt Status.
0x0 = No status interrupt.
0x1 = An LPM transaction is received with a Bit Stuff error or a PID error. In this case, no suspend occurs and the state of the device is now unknown.
|
4 |
RES |
R/W |
0x0 |
LPM Resume Interrupt Status.
This bit is mutually exclusive from the RESUME bit in the USBPOWER register (0x001).
0x0 = No status interrupt.
0x1 = The USB has been resumed.
|
3 |
NC |
R/W |
0x0 |
LPM No Completion Interrupt Status.
0x0 = No status interrupt.
0x1 = An LPM transaction has been transmitted and has failed to complete. The transaction has failed because a time-out occurred or there were bit errors in the response for three attempts.
|
2 |
ACK |
R/W |
0x0 |
LPM ACK Interrupt Status.
0x0 = No status interrupt.
0x1 = An LPM transaction is transmitted and the device responds with an ACK.
|
1 |
NY |
R/W |
0x0 |
LPM NY Interrupt Status.
0x0 = No status interrupt.
0x1 = An LPM transaction is transmitted and the device responds with a NYET.
|
0 |
LPMST |
R/W |
0x0 |
LPM STALL Interrupt Status.
This condition can only occur if the LPMEN field in the LPMCNTRL field is set to 0x1.
0x0 = No status interrupt.
0x1 = An LPM transaction is transmitted and the device has responded with a STALL.
|
Figure 27-76 USBLPMRIS Register (OTG B / Device)
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
RESERVED |
ERR |
RES |
NC |
ACK |
NY |
LPMST |
R-0x0 |
R-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
|
Table 27-83 USBLPMRIS Register Field Descriptions (OTG B / Device)
Bit |
Field |
Type |
Reset |
Description |
7-6 |
RESERVED |
R |
0x0 |
|
5 |
ERR |
R |
0x0 |
LPM Interrupt Status.
0x0 = No status interrupt.
0x1 = An LPM transaction is received that has a Link State field that is not supported and an interrupt has triggered and is pending. In this case the response to the transaction is to STALL. However, the LPMATTR register is updated so that software can observe the non-compliant LPM packet payload.
|
4 |
RES |
R/W |
0x0 |
LPM Resume Interrupt Status.
This bit is mutually exclusive from the RESUME bit in the USBPOWER register (0x001).
0x0 = No status interrupt
0x1 = The USB has been resumed.
|
3 |
NC |
R/W |
0x0 |
LPM NC Interrupt Status.
This condition can only occur when the LPMEN field is set to 0x3 and the TXLPM field is set to 0x1 in the LPMCNTRL register and there is no data pending in the USB TX FIFOs.
0x0 = No status interrupt.
0x1 = An LPM transaction has been received and the USB has responded with a NYET due to a data pending in the RX FIFOs.
|
2 |
ACK |
R/W |
0x0 |
LPM ACK Interrupt Status.
This condition can only occur when the LPMEN field is set to 0x3 and the TXLPM field is set to 0x1 in the LPMCNTRL register and there is no data pending in the USB TX FIFOs.
0x0 = No status interrupt.
0x1 = An LPM transaction is received and the USB responds with an ACK.
|
1 |
NY |
R/W |
0x0 |
LPM NY Interrupt Status.
This condition can only occur when the LPMEN field is set to 0x3 and the TXLPM field is 0x0 in the LPMCNTRL register.
0x0 = No status interrupt.
0x1 = An LPM transaction is received and the USB has responded with a NYET.
|
0 |
LPMST |
R/W |
0x0 |
LPM STALL Interrupt Status.
This condition can only occur if the LPMEN field in the LPMCNTRL field is set to 0x1.
0x0 = No status interrupt.
0x1 = An LPM transaction is received and the USB has responded with a STALL.
|