15.3.7.1 VLAN Filtering

The Ethernet MAC provides VLAN Tag Perfect Filtering and VLAN Tag Hash Filtering. In VLAN tag perfect filtering, the MAC compares the VLAN tag of the received frame and provides the VLAN frame status to the application. Based on the programmed mode of the ETV bit in the EMACVLANTG register, the MAC compares the lower 12 bits or all 16 bits of the received VLAN tag to determine the perfect match. If VLAN tag perfect filtering is enabled, the MAC forwards the VLAN-tagged frames along with VLAN tag match status and drops the VLAN frames that do not match. Inverse matching for VLAN frames can also be enabled by setting the VTIM bit of the Ethernet MAC VLAN Tag (EMACVLANTG) register, offset 0x01C. In addition, matching of S-VLAN tagged frames along with the default C-VLAN tagged frames can be enabled by setting the ESVL bit of the EMACVLANTG register. The VLAN frame status bit (Bit 10 of RDES0) indicates the VLAN tag match status for the matched frames.

The MAC provides VLAN tag hash filtering with a 16-bit Hash table. The MAC performs the VLAN hash matching based on the VTHM bit of the EMACVLANTG register. If the VTHM bit is set, the most significant four bits of VLAN tag's CRC-32 are used to index the content of the Ethernet MAC VLAN Hash Table (EMACVLANHASH) register, offset 0x588. A value of 1 in the EMACVLANHASH register, corresponding to the index, indicates that the VLAN tag of the frame matched and the packet should be forwarded. A value of 0 indicates that VLAN-tagged frame should be dropped. The MAC also supports the inverse matching of the VLAN frames. In the inverse matching mode, when the VLAN tag of a frame matches the perfect or hash filter, the packet should be dropped. If the VLAN perfect and VLAN hash match are enabled, a frame is considered as matched if either the VLAN hash or the VLAN perfect filter matches. When inverse match is set, a packet is forwarded only when both perfect and hash filters indicate mismatch. Table 15-18 shows the different possibilities for VLAN matching and the final VLAN match status. When the RA bit of the EMACFRAMEFLTR register is set, all frames are received and the VLAN match status is indicated in Bit 10 of Receive Descriptor word 0 (RDES0). When the RA bit is not set and the VTFE bit in the EMACFRAMEFLTR register is set, the frame is dropped if the final VLAN match status is fail. In Table 15-18, value X means that this column can have any value. When the VL field is programmed to 0x0 in EMACVLANTG register, all VLAN-tagged frames are considered as perfect matched but the status of the VLAN hash match depends on the VLAN hash enable (VTHM) bit and VLAN inverse filter (VTIM) bit.