SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The Hibernation module can be configured to wake from Hibernate mode if any of the following are enabled:
The Hibernation module can also be configured to wake from hibernate when the following events occur:
The external WAKE pin is enabled by setting the PINWEN bit in the HIBCTL register. The external WAKE pin can generate an interrupt by programming the EXTWEN bit in the Hibernation Interrupt Mask (HIBIM) register.
NOTE
If an external WAKE signal is asserted, the application is responsible for clearing the signal source once the EXTWEN bit has been registered in the Hibernation Raw Interrupt Status (HIBRIS) register.
To use the RST pin as a wake source, the WURSTEN bit must be set in the Hibernate I/O Configuration (HIBIO) register and the WUUNLK bit must be set in the same register.
To enable any of the assigned GPIO pins as a wake source, the WUUNLK bit must be set in the HIBIO register and the wake configuration must be programmed through the GPIOWAKEPEN and GPIOWAKELVL registers in the GPIO module. See Section 17 for more information on programming the GPIOs.
NOTE
The RST pin and GPIO wake sources are cleared by a write to either or both the RSTWK and PADIOWK bits. This clears the source of interrupts for RSTWK, PADIOWK and the GPIOWAKESTAT register.
TMPR[3:0] are enabled by setting the appropriate ENn bits the Tamper IO Control and Status (HIBTPIO) register. The HIBTPIO register overrides the GPIO port configuration registers. By setting the WAKE bit in the Tamper Control (HIBTPCTL) register, a tamper event can cause a wake from Hibernate. If a tamper event occurs, the time of the event and the status of the tamper pins are logged in the Tamper Log (HIBTPLOG) register.
By setting the RTCWEN bit in the HIBCTL register a wake from hibernate can occur when the value of the HIBRTCC register matches the value of the HIBRTCM0 register and the value of the RTCSSC field matches the RTCSSM field in the HIBRTCSS register.
To allow a wake from Hibernate on a low battery event, the BATWKEN bit in the HIBCTL register must be set. In this configuration, the battery voltage is checked every 512 seconds while in hibernation. If the voltage is below the level specified by the VBATSEL field, the LOWBAT interrupt is set in the HIBRIS register.
Upon external wake-up, external reset, tamper event, or RTC match, the Hibernation module delays coming out of hibernation until VDDis above the minimum specified voltage, see .
When the Hibernation module wakes, the microcontroller performs a normal power-on reset. The normal power-on reset does not reset the Hibernation module or Tamper module, but does reset the rest of the microcontroller. Software can detect that the power-on was due to a wake from hibernation by examining the raw interrupt status register (see Section 6.3.13) and by looking for state data in the battery-backed memory (see Section 6.3.7).