SLAU847D October 2022 – May 2024 MSPM0L1105 , MSPM0L1106 , MSPM0L1227 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2227 , MSPM0L2228 , MSPM0L2228-Q1
Software can control the segments by using two memory blocks, LCDMx and LCDBMx. As shown in the figure below, these two memories can be written from the VBUSP bus (system bus) and the contents are read using internal logic. The contents read from these two memory blocks are passed through the blinking override logic before the 64bit LCDVAL is passed to the IO buffers. Each of the 64 LCD pins can be configured as either common line or segment line using the LCDCSSELx registers.