米6体育平台手机版

SLAZ094AB October 2012 – May 2021 CC430F5137

1Functional Advisories
2Preprogrammed Software Advisories
3Debug Only Advisories
4Fixed by Compiler Advisories
5Nomenclature, Package Symbolization, and Revision Identification
6Advisory Descriptions
1. 6.1 ADC24
2. 6.2 ADC25
3. 6.3 ADC27
4. 6.4 ADC29
5. 6.5 ADC42
6. 6.6 ADC69
7. 6.7 AES1
8. 6.8 BSL7
9. 6.9 COMP4
10. 6.10 COMP10
11. 6.11 CPU18
12. 6.12 CPU20
13. 6.13 CPU21
14. 6.14 CPU22
15. 6.15 CPU23
16. 6.16 CPU24
17. 6.17 CPU25
18. 6.18 CPU26
19. 6.19 CPU27
20. 6.20 CPU28
21. 6.21 CPU29
22. 6.22 CPU30
23. 6.23 CPU31
24. 6.24 CPU32
25. 6.25 CPU33
26. 6.26 CPU34
27. 6.27 CPU35
28. 6.28 CPU39
29. 6.29 CPU40
30. 6.30 CPU46
31. 6.31 CPU47
32. 6.32 DMA4
33. 6.33 DMA7
34. 6.34 DMA8
35. 6.35 DMA10
36. 6.36 EEM8
37. 6.37 EEM9
38. 6.38 EEM11
39. 6.39 EEM13
40. 6.40 EEM14
41. 6.41 EEM16
42. 6.42 EEM17
43. 6.43 EEM19
44. 6.44 EEM23
45. 6.45 FLASH29
46. 6.46 FLASH31
47. 6.47 FLASH37
48. 6.48 JTAG20
49. 6.49 JTAG26
50. 6.50 JTAG27
51. 6.51 MPY1
52. 6.52 PMAP1
53. 6.53 PMM8
54. 6.54 PMM9
55. 6.55 PMM10
56. 6.56 PMM11
57. 6.57 PMM12
58. 6.58 PMM14
59. 6.59 PMM15
60. 6.60 PMM17
61. 6.61 PMM18
62. 6.62 PMM20
63. 6.63 PORT15
64. 6.64 PORT16
65. 6.65 PORT17
66. 6.66 PORT19
67. 6.67 PORT21
68. 6.68 RF1A1
69. 6.69 RF1A2
70. 6.70 RF1A3
71. 6.71 RF1A5
72. 6.72 RF1A6
73. 6.73 RF1A8
74. 6.74 RTC3
75. 6.75 RTC6
76. 6.76 SYS16
77. 6.77 TAB23
78. 6.78 UCS6
79. 6.79 UCS7
80. 6.80 UCS9
81. 6.81 UCS10
82. 6.82 UCS11
83. 6.83 USCI26
84. 6.84 USCI30
85. 6.85 USCI31
86. 6.86 USCI34
87. 6.87 USCI35
88. 6.88 USCI39
89. 6.89 USCI40
90. 6.90 WDG4
7Revision History

6.85 USCI31

USCI Module

Function

Framing Error after USCI SW Reset (UCSWRST)

Description

While receiving a byte over USCI-UART (with UCBUSY bit set), if the application resets the USCI module (software reset via UCSWRST), then a framing error is reported for the next receiving byte.

Workaround

1. If possible, do not reset USCI-UART during an ongoing receive operation; that is, when UCBUSY bit is set.

2. If the application software resets the USCI module (via the UCSWRST bit) during an ongoing receive operation, then set and reset the UCSYNC bit before releasing the software USCI reset.

Workaround code sequence:

bis #UCSWRST, &UCAxCTL1 ; USCI SW reset
;Workaround begins
bis #UCSYNC, &UCAxCTL0 ; set synchronous mode
bic #UCSYNC, &UCAxCTL0 ; reset synchronous mode
;Workaround ends

bic #UCSWRST, &UCAxCTL1 ; release USCI reset

6.85 USCI31

Category

Function

Description

Workaround