米6体育平台手机版

SLAZ279AA October 2012 – May 2021 MSP430F5418

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6.115 USCI35

USCI Module

Function

Violation of setup and hold times for (repeated) start in I2C master mode

Description

In I2C master mode, the setup and hold times for a (repeated) START, t_SU,STA and t_HD,STA respectively, can be violated if SCL clock frequency is greater than 50kHz in standard mode (100kbps). As a result, a slave can receive incorrect data or the I2C bus can be stalled due to clock stretching by the slave.

Workaround

If using repeated start, ensure SCL clock frequencies is < 50kHz in I2C standard mode (100 kbps).

6.115 USCI35

Category

Function

Description

Workaround