米6体育平台手机版

SLAZ283AA October 2012 – May 2021 MSP430F5435

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6.64 PMM2

PMM Module

Function

Manual change of LDO voltage reference from 'switched' to 'static' mode may trigger an incorrect set event for SVSxIFG's (where 'x' stands for 'H' or 'L')

Description

The incorrect set event can occur under the following PMM configuration and conditions (please refer to PMM figures titled "High-Side/Low-Side SVS and SVM"):
- SVSxMD is reset to 0, disabling the set of SVSxIFG when LDO is in 'switched' mode
   + LDO voltage reference automatically set to 'switched' mode if:
      - Device enters LPM2, LPM3, LPM4
      - PMMCTL1 register bits PMMCMDx = 10b
- While LDO voltage reference is in 'switched' mode, the supervised voltage level is violated
- LDO voltage reference is changed back to 'static' mode (either by return from LPM mode or through the use of PMMCMDx bits) and the supervised voltage level is still being violated

Workaround

SVSx events are not triggered when the LDO voltage reference is in 'switched' mode and the SVSx high-side mode is disabled (SVSHMD = 0). Under these conditions, the SVSx (SVSxE = 0) should be temporarily disabled for any entry into 'switched' mode.

6.64 PMM2

Category

Function

Description

Workaround