米6体育平台手机版

SLAZ283AA October 2012 – May 2021 MSP430F5435

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6.92 SYS8

SYS Module

Function

Sporadic device crash on LPMx

Description

If an interrupt occurs within 5 ns of the last rising edge of the MCLK prior to entering low-power mode (LPMx), the flash controller experiences a glitch that latches the last address on the address bus. This is the address that contains the opcode following the entry to LPMx.

When the core then requests the address for the interrupt handler routine, the flash instead returns the the data at the address that was latched. This data is interpreted as the address for the interrupt handler, resulting in errant code execution and an eventual reset condition.

Workaround

None.

6.92 SYS8

Category

Function

Description

Workaround