米6体育平台手机版

SLAZ283AA October 2012 – May 2021 MSP430F5435

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6.37 DMA10

DMA Module

Function

DMA access may cause invalid module operation

Description

The peripheral modules MPY, CRC, USB, RF1A and FRAM controller in manual mode can stall the CPU by issuing wait states while in operation. If a DMA access to the module occurs while that module is issuing a wait state, the module may exhibit undefined behavior.

Workaround

Ensure that DMA accesses to the affected modules occur only when the modules are not in operation. For example with the MPY module, ensure that the MPY operation is completed before triggering a DMA access to the MPY module.

6.37 DMA10

Category

Function

Description

Workaround