SLLSF86C May 2018 – March 2022
PRODUCTION DATA
To make sure that operation is reliable at all data rates and supply voltages, adequate decoupling capacitors must be located as close to supply pins as possible. Power converter input VDD and output VISOOUT supply pins should have high frequency ceramic capacitors 10 nF and bulk capacitors 10 μF atleast close to the pins. Signal path supply pins, VIO and VISOIN, should have 100 nF or higher value ceramic bypass capacitors close to device pins. ISOW1412 can consume typical peak pulse currents of upto 250 mA under fully loaded conditions for short durations (10s of µs) from the power source that is powering VDD of ISOW1412. Please make sure the current limit of upstream power device is at least 300 mA typical.