SLLU312A July 2019 – May 2022 TCAN4550-Q1
The TCAN4550-Q1 M_CAN controller is used to force a dominant and recessive output by the processor. The way to accomplish this without impacting the CAN bus is to use two of the SPI & M_CAN test modes at the same time. Figure 3-8 shows the three SPI & M_CAN test modes. The top two are the ones used for this test. When used together the output goes to the GPO2 pin. This allows the processor to verify the output is what is expected without needing to understand the CAN FD protocol. This is accomplished by using register 16'h0800[21]; TEST_MODE_EN and 16'h0800[0]; TEST_MODE_CONFIG followed by setting test register 16'1010 for M_CAN core. This shows SPI through M_CAN working.