Figure 2-8 Test Condition: AC Plugged in, BLK UVLO; Ch1 – LO, Ch2 – VCC, Ch3 – RVCC, Ch4 – HV

Figure 2-9 Zoomed In: Test Condition: AC Plugged in, BLK UVLO; Ch1 – LO, Ch2 – VCC, Ch3 – RVCC, Ch4 – HV

In Figure 2-8 and Figure 2-9, we can observe that whenever test current being injected (for every 700 ms) HV pin voltage is being pulled down. Also, when VCC is reduced to VCCRestartJFET threshold, VCC charging is initiated.

Figure 2-10 Waveform Capture of AC Input Removal and X-cap Discharge