SLUAAS8 November   2024 TPS1210-Q1 , TPS4810-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2BMS System Overview
  6. 3Application of TPS1210-Q1 and TPS4810-Q1 to accomplish the Battery Disconnect Switch Design
    1. 3.1 Separate Charge and Discharge FET Control
    2. 3.2 Charge, Discharge FET Control With Pre-Charge Functionality
    3. 3.3 Current Sensing for Short Circuit Protection
    4. 3.4 Reverse Polarity Protection
    5. 3.5 Diagnostics
      1. 3.5.1 FET Diagnostics
      2. 3.5.2 Short Circuit Protection Comparator Diagnostics
      3. 3.5.3 Fault Indication
  7. 4Summary
  8. 5References

Introduction

The TPS1210-Q1 and TPS4810-Q1 is a family low IQ, smart high side drivers with protection and diagnostics targeted for BMS breaker application. TPS1210-Q1 has an operating voltage range of 3.5V – 40V, and is designed for 12V, system designs whereas the TPS4810-Q1 has an operating voltage range of 3.5V – 80V with 100V of absolute maximum rating making TPS1210-Q1 designed for 48V system designs. The devices has two strong (2A) GATE drivers with separate control inputs (INP1, INP2) to drive back-to-back MOSFETs in common source configuration. Strong GATE driving enables power switching using parallel FETs in high current system designs. The device provides configurable short-circuit protection using ISCP and TMR pins for adjusting the threshold and response time respectively. Auto-retry and latch-off fault behavior can be configured. Current sensing can be done either by an external sense resistor or by MOSFET VDS sensing. High side or low side current sense resistor configuration is possible by using CS_SEL pin input. Diagnosis of the integrated short circuit comparator is possible using external control on SCP_TEST input. The device indicates fault (FLT) on open drain output during short circuit, charge pump undervoltage, and input undervoltage conditions. Low Quiescent Current of 35µA in operation enables always ON system designs. Quiescent current reduces to 1.5μA (typical) with EN/UVLO low.

 Functional Block
                    Diagram Figure 1-1 Functional Block Diagram