SLUSCK0G November 2017 – November 2024
PRODUCTION DATA
The recommended input supply voltage (VCCI) for UCC21220 and UCC21220A is between 3 V and 5.5 V. The output bias supply voltage (VDDA/VDDB) range from 9.2 V to 25 V. The lower end of this bias supply range is governed by the internal undervoltage lockout (UVLO) protection feature of each device. One must not let VDD or VCCI fall below their respective UVLO thresholds (for more information on UVLO, see Section 8.3.1). The upper end of the VDDA/VDDB range depends on the maximum gate voltage of the power device being driven by UCC21220 and UCC21220A. The UCC21220 and UCC21220A have a recommended maximum VDDA/VDDB of 25 V.
A local bypass capacitor should be placed between the VDD and VSS pins. Position this capacitor as close to the device as possible. A low ESR, ceramic surface mount capacitor is recommended. Place two capacitors, including one with a value of ≈10-µF for device biasing, and an additional ≤100-nF capacitor in parallel for high-frequency filtering.
Similarly, place a bypass capacitor between the VCCI and GND pins. Given the small amount of current drawn by the logic circuitry within the input side of UCC21220 and UCC21220A, this bypass capacitor has a minimum recommended value of 100 nF.