SLUSDG3F August 2018 – September 2024
PRODUCTION DATA
When parasitic inductances are introduced by non-ideal PCB layout and long package leads (e.g. TO-220 and TO-247 type packages), there could be ringing in the gate-source drive voltage of the power transistor during high di/dt and dv/dt switching. If the ringing is over the threshold voltage, there is the risk of unintended turn-on and even shoot-through. Applying a negative bias on the gate drive is a popular way to keep such ringing below the threshold. Below are a few examples of implementing negative gate drive bias.
Instead of using two separate power for generating positive and negative drive voltage Figure 8-2 shows the example with negative bias turn-off on the channel-A driver using a Zener diode on the isolated power supply output stage. The negative bias is set by the Zener diode voltage. If the isolated power supply, VA, is equal to 19 V, the turn-off voltage will be –3.9 V and turn-on voltage will be 19 V -– 3.9 V ≈ 15 V. The channel-B driver circuit is the same as channel-A, therefore, this configuration needs only one power supply for each driver channel, and there will be steady state power consumption from RZ.
Figure 8-3 shows another example which uses bootstrap to provide power for the channel A, this solution doesn't have negative rail voltage, it is only suitable for circuits with less ringing or the power device has high threshold voltage.
The last example, shown in Figure 8-4, is a single power supply configuration and generates negative bias through a Zener diode in the gate drive loop. The benefit of this solution is that it only uses one power supply and the bootstrap power supply can be used for the high side drive. This design requires the least cost and design effort among the three solutions. However, this solution has limitations: