| RSVD (Bits 15–13): Reserved. Do not use. |
| | |
| SME0 (Bit 12): Enables smoothing until the EDV0 point |
| 1 = | Enable smoothing to EDV0 |
| 0 = | Disable smoothing to EDV0 |
|
| IGNORE_SD (Bit 11): Enables ignoring of self-discharge |
| 1 = | Enable ignore self-discharge |
| 0 = | Disable ignore self-disharge |
| | |
| FC_FOR_VDQ (Bit 10): |
| 1 = | FC is required to get VDQ. |
| 0 = | FC is not required to get VDQ. |
| | |
| CHG_DEFICIT_EN (Bit 9): Charge Deficit after Valid Charge Termination |
| 1 = | Apply charge deficit at charge termination (that is, FullChargeCapacity() – RemainingCapacity()) to subsequent starting capacity at next discharge |
| 0 = | Do not apply charge deficit (that is, start discharge from RemainingCapacity() = FullChargeCapacity()) |
| | |
| FCC_LIMIT (Bit 8): Full Charge Capacity Limiting |
| 1 = | Cap Full Charge Capacity to Design Capacity |
| 0 = | Do not cap Full Charge Capacity to Design Capacity |
| | |
| VFLT_EN (Bit 7): Voltage Filter for EDV Detection |
| 1 = | Apply filtering to voltage check for EDV detection. This is useful for pulse loading scenarios. |
| 0 = | Do not apply filtering to voltage check for EDV detection |
| | |
| RSVD (Bit 6): Prevent OCV Measurement in Flat Region |
| 1 = | Enable |
| 0 = | Disable |
| | |
| FIXED_EDV0 (Bit 5): Use fixed voltage for EDV0 |
| 1 = | Enable |
| 0 = | Disable |
| | |
| SC (Bit 4): FCC Learning Optimized for Smart Charger |
| 1 = | Enable |
| 0 = | Disable |
| | |
| EDV_CMP (Bit 3): Dynamically calculate voltages for EDV2, 1, and 0 |
| 1 = | Enable |
| 0 = | Disable |
| | |
| EDV_PACK (Bit 2): EDV Detection Method |
| 1 = | Pack-based |
| 0 = | Cell-based |
| | |
| CSYNC (Bit 1): Sync RemainingCapacity() to FullChargeCapacity() on Valid Charge Termination |
| 1 = | Enable |
| 0 = | Disable |
| | |
| CCT (Bit 0): Cycle Count Increment Threshold |
| 1 = | Uses Full Charge Capacity |
| 0 = | Uses Design Capacity |