SLUUBY1B December 2020 – April 2022 BQ76942
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| SLEEP | RSVD_0 | SD_CMD | PF | SS | FUSE | SEC1 | SEC0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| OTPB | OTPW | COW_CHK | WD | POR | SLEEP_EN | PCHG_MODE | CFGUPDATE |
Description: Flags related to battery status
| Bit | Field | Description |
|---|---|---|
| 15 | SLEEP | This bit indicates whether or not the device is presently in SLEEP mode. 0 = Device is not in SLEEP mode. 1 = Device is in SLEEP mode. |
| 13 | SD_CMD | This bit is set when shutdown is pending because the command was received or the RST_SHUT pin was asserted for at least one second. 0 = Shutdown due to command or pin is not pending. 1 = Shutdown due to command or pin is pending. |
| 12 | PF | This bit indicates whether or not an enabled Permanent Fail fault has triggered. 0 = No Permanent Fail fault has triggered. 1 = At least one Permanent Fail fault has triggered. |
| 11 | SS | This bit indicates whether or not an enabled safety fault is triggered. 0 = No safety fault is triggered. 1 = At least one enabled safety fault is triggered. |
| 10 | FUSE | This bit reports the most recently observed state of the FUSE pin and is updated every second. 0 = FUSE pin was not asserted by device or secondary protector at last sample. 1 = FUSE pin was asserted by device or secondary protector at last sample. |
| 9–8 | SEC1–SEC0 | These bits indicate the present security state of the device. When in SEALED mode, device configuration may not be read or written and some commands are restricted. When in UNSEALED mode, device configuration may normally be read and may be written while in CONFIG_UPDATE mode. When in FULLACCESS mode, unrestricted read and write access is allowed and all commands are accepted. Even in FULLACCESS mode, changes to device configuration should only be changed while also in CONFIG_UPDATE mode. 0 = Device has not initialized yet. 1 = Device is in FULLACCESS mode. 2 = Device is in UNSEALED mode. 3 = Device is in SEALED mode. |
| 7 | OTPB | This bit indicates whether or not voltage and temperature conditions are valid for OTP programming. During normal operation, this bit will always be set if Manufacturing Status()[OTPW] is clear. When entering CONFIG_UPDATE mode, conditions will be checked and this bit will reflect whether or not programming is allowed (Manufacturing Status()[OTPW] does not apply in CONFIG_UPDATE mode). Once in CONFIG_UPDATE mode, this bit will not change state since no new measurements are being taken. 0 = OTP writes are allowed. 1 = Writes to OTP are blocked. |
| 6 | OTPW | This bit indicates whether or not some data is waiting to be written to OTP during normal operation. This can occur when, for example, configured to Permanent Fail information to OTP. This bit may remain set until conditions for OTP programming are met and all data is programmed. This bit is not set during OTP programming from CONFIG_UPDATE mode. 0 = No writes to OTP are pending. 1 = Writes to OTP are pending. |
| 5 | COW_CHK | This bit indicates while cell open-wire checks are occurring. When the feature is disabled, this bit will not set. When the feature is enabled, this bit will set periodically as the checks are performed. 0 = Device is not actively performing a cell open-wire check. 1 = Device is actively performing a cell open-wire check. |
| 4 | WD | This bit indicates whether or not the previous device reset was caused by the internal watchdog timer. This is not related to the Host Watchdog protection. 0 = Previous reset was normal. 1 = Previous reset was caused by the watchdog timer. |
| 3 | POR | This bit is set when the device fully resets. It is cleared upon exit of CONFIG_UPDATE mode. It can be used by the host to determine if any RAM configuration changes were lost due to a reset. 0 = Full reset has not occurred since last exit of CONFIG_UPDATE mode. 1 = Full reset has occurred since last exit of CONFIG_UPDATE and reconfiguration of any RAM settings is required. |
| 2 | SLEEP_EN | This bit indicates whether or not SLEEP mode is allowed based on configuration and commands. The Settings:Configuration:Power Config[SLEEP] bit sets the default state of this bit. The host may send commands to enable or disable SLEEP mode based on system requirements. When this bit is set, the device may transition to SLEEP mode when other SLEEP criteria are met. 0 = SLEEP mode is disabled by the host. 1 = SLEEP mode is allowed when other SLEEP conditions are met. |
| 1 | PCHG_MODE | This bit indicates whether or not the device is in PRECHARGE mode. In PRECHARGE mode, the PCHG FET is turned on instead of the CHG FET. 0 = Device is not in PRECHARGE mode. 1 = Device is in PRECHARGE mode. |
| 0 | CFGUPDATE | This bit indicates whether or not the device is in CONFIG_UPDATE mode. It will be set after the SET_CFGUPDATE command is received and fully processed. Configuration settings may be changed only while this bit is set. 0 = Device is not in CONFIG_UPDATE mode. 1 = Device is in CONFIG_UPDATE mode. |