I²C clock stretches can occur during all modes of fuel gauge operation. In SLEEP mode, a short clock stretch occurs on all I²C traffic, as the device must wake up to process the packet. In NORMAL and SLEEP modes, clock stretching only occurs for packets addressed for the fuel gauge. The timing of stretches varies as interactions between the communicating host and the gauge are asynchronous. The I²C clock stretches may occur after start bits, the ACK/NACK bit, and first data bit transmit on a host read cycle. The majority of clock stretch periods are small (≤ 4 ms), as the I²C interface peripheral and CPU firmware perform normal data flow control. However, less frequent but more significant clock stretch periods may occur when data flash is written by the CPU to update the Ra tables and other data flash parameters, such as QMax. Due to the organization of data flash, updates need to be written in data blocks consisting of multiple data bytes.

For example, an Ra table update requires erasing a single page of data flash and programming the updated Ra table. The potential I²C clock stretching time is 40.08 ms maximum. This includes a 40-ms page erase and 40-µs row programming time (×2 rows). The Ra table updates occur during the discharge cycle and at up to 15 resistance grid points that occur during the discharge cycle.