SLUUCA6 October 2021 BQ27Z746
The BQ27Z746 provides several Impedance Track configuration options to fine-tune the gauging performance. These configurations can be turned on or off through the corresponding flags in Settings: IT Gauging Configuration and I2C Gauging Configuration.
[LOCK0]: After a discharge event, cell voltage usually recovers to a slightly higher voltage during RELAX mode. A new OCV reading during this time can result in a slightly higher state-of-charge. This flag provides an option to keep RemainingCapacity() and RelativeStateOfCharge() locked during relaxation after 0% and GaugingStatus()[FD] are reached during discharge. The lock is removed once CHARGE mode is entered.
[1PERCENT_HOLD]: When enabled, holds the RSOC value at 1% until Term Voltage has been reached during discharge.
[RSOC_HOLD]: An IT simulation will run at the onset of discharge. If charge terminates at a low temperature and discharge occurs at a higher temperature, the difference in temperature could cause a small rise of RSOC for a short period of time at the beginning of discharge. This flag option prevents RSOC rises during discharge. RSOC will be held until the calculated value falls below the actual state.
[RSOCL]: When set, RSOC will be held to 99% until charge termination is detected.
[RFACTSTEP]: The gauge keeps track of the change in Ra over 15 updates. It is limited to 1.5 max. During an Ra update, if (new Ra)/(old Ra) > 1.5 or < 0.5, the gauge will take different actions based on the setting of this flag.
If the flag is set to 1 (default), the gauge allows Ra to update once using the max factor of 1.5 or min factor of 0.5, then disables the Ra update. If this flag is set to 0, the gauge will not update Ra, but will disable it. It is recommended to keep the default setting. In both cases, GaugingStatus()[RDIS] is set.
[OCVFR]: An OCV reading is taken when a dV/dt condition is met. This is not the case if charging stops within or below the flat voltage region, which varies with ChemID. The change of cell voltage in this region is very small; therefore, the same voltage error can correspond to a larger DOD error. This flag is set by default. The device waits 48 hours before taking an OCV reading if charging stops prematurely. A short discharge will not cancel this 48-hour wait. An OCV reading is taken when the dV/dt condition is met. To reduce test time during evaluation, it is helpful to remove the 48-hour wait-time requirement.
[DOD0EW]: DOD0 readings have an associated error based on the elapsed time since the reading, the conditions at the time of the reading (reset, charge termination, and so on), the temperature, and the amount of relax time at the time of the reading, among others. This flag provides an option to take into account both the previous and new calculated DOD0, which are weighted according to their respective accuracies. This can result in improved accuracy and in reduction of RSOC jumps after relaxation.
[LFP_RELAX]: When enabled, this bit activates an additional functionality only if the chemistry ID programmed indicates a LiFePO4 chemistry (ID 0x4xxx or 0x04xx). Having this bit enabled with a non-LiFePO4 cell type does not introduce any behavioral modifications.
LiFePO4 has a unique, slow configuration relaxation near full charge. The slow decaying voltage causes RSOC to continue to drop every 5 hours. Depending on the full charge taper current, the fully settled voltage could be close to or even below FlatVoltMax in some cases. If [LFP_RELAX] is enabled and the LiFePO4 chemID is selected, [OCVFR] will be set on exit from CHARGE mode regardless of voltage or state of charge. For [OCVFR] to clear, a relaxation of 48 hours or non-trivial discharge must occur. A non-trivial discharge is indicated when the cell voltage in relaxation falls below FlatVoltMin. The QMax update is unlikely disabled because DOD will not update due to [OCVFR] forcing the 48-hour timeout, and voltage likely relaxing into the flat zone. Therefore, the QMax update takes an alternative approach: Once full charge occurs ([FC] bit set), DOD0 = Dod_at_EOC is automatically assigned and valid for a QMax update. [VOK] is set if there is no QMax update. If QMax is updated, [VOK] is cleared. The DOD error, as a result of this action, is zero or negligible because in the LiFePO4 table, the OCV voltage corresponding to DOD = 0 is much lower. [RSOC_CONV]: This function is also called fast resistance scaling. It is an option to address the convergence of RSOC to 0% at a low temperature and a very high rate of discharge. See Fast Resistance Scaling for more details.
[FAST_QMAX_LRN] and [FAST_QMAX_FLD]: The first flag enables Fast QMax during the learning cycle when Update Status = 06. The second bit enables Fast QMax in the field when Update Status ≥ 06. See Fast QMax Update Conditions for more details on Fast QMax.
[FF_NEAR_EDV]: Fast filter near EDV. If this flag is set to 1, the gauge applies an alternative filter, Near EDV Ra Param Filter, for an Ra update in the fast scaling region (starting around 10% RSOC). This flag should be kept to 1 as a default. If this flag is set to 0, the gauge uses the regular Ra filter, Resistance Parameter Filter. Both DF filters should not be changed from the default value.
[SMOOTH]: If this bit is set to 1, the smoothing engine is enabled. For more details, see Smoothing Engine, which covers [RELAX_JUMP_OK], [RELAX_SMOOTH_OK], [CHG_100_SMOOTH_OK], and [DSG_0_SMOOTH_OK] as further configuration to the smoothing engine.
[CSYNC]: If this bit is set to 1, the gauge synchronizes RemainingCapacity() to FullChargeCapacity() at valid charge termination.
[CCT]: This bit provides an option to use FullChargeCapacity() (when [CCT] = 1) or DesignCapacity() (when [CCT] = 0) for cycle count threshold calculation. Regardless of whether FullChargeCapacity() or DesignCapacity() is selected for cycle count threshold calculation, the minimum cycle count threshold is always 10% of DesignCapacity(). This helps to avoid any erroneous cycle count increment caused by an extremely low FullChargeCapacity() or improper settings of Cycle Count Percentage.
[TAMB_SYNC_SIM]: If this bit is set to 1, the gauge performs an IT simulation after the TambientSync() command is received to use the newly recorded ambient temperature. This IT simulation could produce a change in RelativeStateOfCharge() if [SMOOTH] = 0. If [SMOOTH] = 1, RelativeStateOfCharge() behaves according to the configuration of the smoothing engine.
[AMB_PRED]: If this bit is set to 1, ambient temperature can be predicted during DISCHARGE and CHARGE modes. This can be useful in system applications that experience large increases in ambient temperature during discharges and/or charges without entry to RELAX mode. Ambient temperature prediction is triggered after being in DISCHARGE/CHARGE for Predict Ambient Time, when the system is assumed to be at thermal equilibrium.
[THERM_IV]: If this bit is set to 1, battery heat is held constant near the end of an IT simulation. This helps prevent overestimation of temperature towards the end of discharge, and applies to SOH simulations.
[THERM_SAT]: If this bit is set to 1, IT simulations occurring near termination in a sustained discharge (when thermal saturation is reached) assume simulated temperature to be equal to measured cell temperature. This behavior does NOT apply to SOH simulations.
[FOCV_EN]: If this bit is set to 1, the gauge enables a fast OCV algorithm to predict the final OCV value, which reduces relaxation requirements for QMax updates.
Class | Subclass | Name | Type | Min | Max | Default | Description |
---|---|---|---|---|---|---|---|
Settings | Configuration | I2C Gauging Configuration | H1 | 0x00 | 0x3F | 0x20 | Bit 0: RSOCL—RelativeStateOfCharge() and RemainingCapacity() behavior at end of charge 0 = Actual value shown (default) 1 = Held at 99% until valid charge termination. On entering valid charge termination, updates to 100% Bit 1: RSOC_HOLD—Prevents RSOC from increasing during discharge 0 = RSOC is not limited. 1 = RSOC is not allowed to increase during discharge. Bit 2: LOCK0—Keeps RemainingCapacity() and RelativeStateOfCharge() from jumping back during relaxation after 0 was reached during discharge 0 = Disabled (default) 1 = Enabled Bit 3:RSVD BIT 4: 1PERCENT_HOLD 0 = Disabled 1= Enabled Bit 5: TAMB_SYNC_SIM—Ambient Temperature Synchronization Simulation 0 = Disabled 1 = Enabled (default) Bit 7:6: Reserved |
Settings | Configuration | IT Gauging Configuration | H2 | 0x0000 | 0xFFFF | 0xD5FE | Bit 0: CCT—Cycle count threshold 0 = Use DesignCapacity() for cycle count threshold (default) 1 = Use FullChargeCapacity() for cycle count threshold Bit 1: CSYNC—Syncs RemainingCapacity() with FullChargeCapacity() at valid charge termination 0 = Not synchronized 1 = Synchronized (default) Bit 2: RFACTSTEP—Ra factor step 0 = Disabled 1 = Enabled (default) Bit 3: OCVFR—Open circuit voltage flat region 0 = Disabled 1 = Enabled (default) Bit 4: DOD0EW—DOD0 error weighting 0 = Disabled 1 = Enabled (default) Bit 5: RSVD— Do not use. Bit 6: RSOC_CONV—RSOC convergence (fast resistance scaling) 0 = Disabled 1 = Enabled (default) Bit 7: FAST_QMAX_LRN—Fast QMax LEARN mode 0 = Disabled 1 = Enabled (default) Bit 8: FAST_QMAX_FLD—Fast QMax FIELD mode 0 = Disabled 1 = Enabled (default) Bit 9: RSVD Bit 10: FF_NEAR_EDV—Fast filter near EDV 0 = Disabled 1 = Enabled (default) Bit 11: RELAX_JUMP_OK—Enables RSOC Jumps in RELAX mode 0 = Disabled (default) 1 = Enabled Bit 12: SMOOTH—Smoothing engine 0 = Disabled 1 = Enabled (default) Bit 13: LFP_RELAX—Lithium iron phosphate relax 0 = Disabled 1 = Enabled Bit 14: RELAX_SMOOTH_OK—Smoothing in RELAX 0 = Disabled 1 = Enabled (default) Bit 15: DOD_RSCALE_EN—Configures which DOD the new RaScale is to be applied. 0 = The RaScale is applied to all DODs during IT simulations. 1 = The RaScale is only applied to DODs higher than the DOD where the RaScale is calculated. (default) |
Settings | Configuration | IT Gauging Ext | H2 | 0x0000 | 0x003F | 0x003B | Bit 0: DSG_0_SMOOTH_OK—Smoothing to 0% 0 = Disabled 1 = Enabled (default) Bit 1: CHG_100_SMOOTH_OK—Smoothing to 100% 0 = Disabled 1 = Enabled (default) Bit 2: AMB_PRED—Ambient temperature prediction 0 = Disabled (default) 1 = Enabled Bit 3: THERM_IV—Thermal model IV heat 0 = Disabled 1 = Enabled (default) Bit 4: THERM_SAT—Thermal model saturation 0 = Disabled 1 = Enabled (default) Bit 5: FOCV_EN—Enables fast OCV feature 0 = Disabled 1 = Enabled (default) Bits 15:6: RSVD |