SLUUCC4A October 2020 – September 2021 TPS92520-Q1
Device: The window shows a fault timer that is selectable in ms. A check box sets whether the limp home mode reference point is generated from the LHxIADJ registers for each channel or if the input voltage at the LHI pin sets the reference voltage for both channels. See the Detailed Description section of the TPS92520-Q1 data sheet for more detailed information. The Limp Mode On button sets the LHSW bit in the SYSCFG1 register. This allows to turn on the setting put into the limp home registers without having to go through the conditions that cause the device to go into limp home mode.
An example limp home mode is as follows. The Channels are enabled using the enable box. The PWM source box is enabled and it sets the PWM duty cycle references to the slide bar for PWM, which is the internal PWM duty cycle control. The PWM duty cycle is set to 512 out of 1024 scale and is therefore a 50% duty cycle. The On Time slide bar is set to 7, which is the approximately 440-kHz switching frequency. Analog Current is set to 300, which sets the board to output to approximately 519 mA. The Fault Timer is set to 4 ms. The LHI Ref: LHi box is not selected; therefore the reference for limp home is internal.