SLUUCF2C January 2021 – May 2022 BQ769142
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | Configuration | Power Config | H2 | 0x0000 | 0xFFFF | 0x2982 | Hex |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RSVD_0 | RSVD_0 | DPSLP_OT | SHUT_TS2 | DPSLP_PD | DPSLP_LDO | DPSLP_LFO | SLEEP |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| OTSD | FASTADC | CB_LOOP_SLOW_1 | CB_LOOP_SLOW_0 | LOOP_SLOW_1 | LOOP_SLOW_0 | WK_SPD_1 | WK_SPD_0 |
| Bit | Field | Default | Description |
|---|---|---|---|
| 13 | DPSLP_OT | 1 | Enables transition from DEEPSLEEP to SHUTDOWN based on on-chip
overtemperature
detection. 0 = In DEEPSLEEP, on-chip OT is disabled 1 = On-chip OT is enabled in DEEPSLEEP, allowing transition to SHUTDOWN |
| 12 | SHUT_TS2 | 0 | When TS2 is used as a thermistor or has some other external
pulldown, SHUTDOWN mode cannot be used. If TS2 is externally pulled
down, this bit should be set to prevent the device from immediately
exiting SHUTDOWN mode in some circumstances. When this bit is set
and SHUTDOWN conditions are met, the device will instead enter a low
power state waiting for a rising edge on the LD pin. 0 = Standard SHUTDOWN mode behavior is selected. 1 = SHUTDOWN mode replaced by low-power state waiting for rising edge on LD pin |
| 11 | DPSLP_PD | 1 | Enables wake from DEEPSLEEP based on charger attach. When clear,
DEEPSLEEP mode must be exited via host command. 0 = DEEPSLEEP not exited on rising edge on LD pin 1 = A rising edge on the LD pin exits DEEPSLEEP |
| 10 | DPSLP_LDO | 0 | Determines whether or not REG1 and REG2 are disabled in DEEPSLEEP
mode 0 = Disables REG1 and REG2 when entering DEEPSLEEP mode 1 = Leaves REG1 and REG2 in present state when entering DEEPSLEEP |
| 9 | DPSLP_LFO | 0 | Determines whether or not to disable the Low Frequency Oscillator
in DEEPSLEEP mode to conserve power. 0 = Disables the Low Frequency Oscillator in DEEPSLEEP mode (recommended) 1 = Enables the Low Frequency Oscillator in DEEPSLEEP mode |
| 8 | SLEEP | 1 | Sets the default value of BatteryStatus()[SLEEP_EN] which
enables or disables SLEEP mode. After initialization, SLEEP_EN can
stil be changed via the SLEEP_ENABLE and SLEEP_DISABLE
subcommands. 0 = Disables SLEEP mode by default 1 = Enables SLEEP mode by default |
| 7 | OTSD | 1 | Enables or disables the on-chip
overtemperature
detection circuit to shut down the device in case of a severe
on-chip
overtemperature
condition. 0 = Disables SHUTDOWN from on-chip overtemperature detection circuit (not recommended) 1 = Enters SHUTDOWN mode when an on-chip overtemperature condition is detected |
| 6 | FASTADC | 0 | Selects ADC conversion speed for voltage and simultaneous current
measurements. Higher speed results in lower accuracy. 0 = 3 ms per conversion 1 = 1.5 ms per conversion |
| 5–4 | CB_LOOP_SLOW_1–CB_LOOP_SLOW_0 | 0 | Selects ADC scan loop speed while cell balancing is active by
inserting current-only measurements after each voltage and
temperature scan loop. This can be used to slow down voltage
measurements while balancing to increase the duty-cycle, since
balancing must be paused during measurement of the cell. 0 = Full speed 1 = Half speed 2 = Quarter speed 3 = Eighth speed |
| 3–2 | LOOP_SLOW_1–LOOP_SLOW_0 | 0 | Selects normal ADC scan loop speed by inserting current-only
measurements after each voltage and temperature scan loop. This
setting is only used while cell balancing is not active. 0 = Full speed 1 = Half speed 2 = Quarter speed 3 = Eighth speed |
| 1–0 | WK_SPD_1–WK_SPD_0 | 2 |
Selects the coulomb counter conversion speed used in SLEEP mode for the current wake comparator function. Slower conversion speed results in lower noise. Setting 0x2 may exhibit a large offset and should be avoided. Setting 0x3 results in ~100μV (1-sigma) noise level, so should only be used when the Wake Comparator Current is set to a level such that |VSRP–VSRN| > 1000 μV. 0x0 = 48 ms conversion rate 0x1 = 24 ms conversion rate 0x2 = 12 ms conversion rate 0x3 = 6 ms conversion rate |