SLUUCF2C January 2021 – May 2022 BQ769142
Class | Subclass | Name | Type | Min | Max | Default | Unit |
---|---|---|---|---|---|---|---|
Settings | Configuration | SPI Configuration | H1 | 0x00 | 0x7F | 0x20 | — |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RSVD_0 | MISO_REG1 | FILT | RSVD_0 | RSVD_0 | RSVD_0 | RSVD_0 | RSVD_0 |
Bit | Field | Default | Description |
---|---|---|---|
6 | MISO_REG1 | 0 | Configures SPI MISO pin to use REG1 output drive level 0 = SPI MISO uses 1.8V output level 1 = SPI MISO uses REG1 output level |
5 | FILT | 1 | Configures digital filters on SPI input pins 0 = Disable digital filters on SPI input pins (recommended for high-frequency operation) 1 = Enable digital filters on SPI input pins |