The BQ769142 device includes two multifunction pins, DDSG and DCHG, which can be configured as logic-level outputs to provide a fault-related signal to a host processor or external circuitry (that is, DDSG and DCHG functionality), as a thermistor input, a general purpose ADC input, or a general purpose digital output.

When used as a digital output, the pins can be configured to drive an active high output, with the output voltage driven from either the REG18 1.8 V LDO or the REG1 LDO (which can be programmed from 1.8 V to 5.0 V). Note: if a DC or significant transient current may be driven by a pin, then the output should be configured to drive using the REG1 LDO, not the REG18 LDO.

When the pins are configured for DDSG and DCHG functionality, they provide signals related to protection faults that (on the DCHG pin) would normally cause the CHG driver to be disabled, or (on the DDSG pin) would normally cause the DSG driver to be disabled. These signals can be used to control external protection circuitry, if the integrated high-side NFET drivers will not be used in the system. They can also be used as interrupts in manual FET control mode for the host processor to decide whether to disable the FETs using the CFETOFF and DFETOFF pins.

For example, if the DDSG pin is configured for DDSG functionality, and the Cell Overvoltage (COV) protection is enabled, the DDSG pin will be deasserted while there is no fault present. When a COV fault occurs, the DDSG pin will be asserted. When the device recovers from the COV fault, the DDSG pin will be deasserted. The polarity of the drive signal on the pin is also programmable.

When the DDSG and DCHG pins are configured for DDSG and DCHG functionality, they will assert or deassert as described above during NORMAL, SLEEP, and DEEPSLEEP modes of operation. The pins will be high-impedance while the device is in SHUTDOWN mode.