A power supply capable of providing 10 A or greater must be connected to J3 (PVIN) through a pair of 14-AWG wires or better. The PVIN test points, PVIN_SNS and PGND_SNS, provide a place to monitor the PVIN input voltage. Do not use these monitoring test points as the input supply connection points. The PCB traces connecting to these test points are not designed to support high currents.
The load must be connected to J4 (VOUT) with a
pair of 10-AWG wires or better. Wire lengths must
be minimized to reduce losses in the wires. If there is too much voltage drops
in the wires, then the electronic load can not be able to sink the full rated
current. The VO_REG test point is used to monitor the output voltage with
GND_REG as the ground reference.
Ensure that J8 is populated so that the part is enabled.
Populate J6 to the correct bias selection - PVIN or EXT.
When testing with an external 5-V bias supply to power VCC/VDRV, connect the external supply to J5 (EXTBIAS) with a pair of 20-AWG wires or better.
To test the VINSENP function, connect a load to J2 (IEXT) with a pair of 14-AWG wires or better. When testing this function, the PVIN power supply must be capable of sourcing this additional external load current. Additionally, the load must have the proper voltage and power rating. For example, when the voltage at PVIN is 12 V and if pulling 20 A out of J2, the power supply must also source an additional 20 A and the load must have a power rating of at least 240 W.
If modifications are made to the TPS548C26EVM, the input current can change. The input power supply and wires connecting the EVM to the power supply must be rated for the input current.