SLUUCI8 November   2023 BQ76905

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Battery Notational Conventions
    3.     Trademarks
    4.     Glossary
  3. Introduction
  4. Device Description
    1. 2.1 Overview
    2. 2.2 Functional Block Diagram
  5. Device Configuration
    1. 3.1 Direct Commands and Subcommands
    2. 3.2 Configuration Using OTP or Registers
    3. 3.3 Data Formats
      1. 3.3.1 Unsigned Integer
      2. 3.3.2 Integer
      3. 3.3.3 Hex
  6. Device Security
  7. Measurement Subsystem
    1. 5.1 Voltage Measurement
      1. 5.1.1 Voltage Measurement Schedule
      2. 5.1.2 Unused VC Cell Input Pins
      3. 5.1.3 General Purpose ADCIN Functionality
    2. 5.2 Coulomb Counter and Digital Filters
    3. 5.3 Internal Temperature Measurement
    4. 5.4 Thermistor Temperature Measurement
    5. 5.5 Measurement Calibration
  8. Protection Subsystem
    1. 6.1  Protections Overview
    2. 6.2  Protection FET Drivers
    3. 6.3  Cell Overvoltage Protection
    4. 6.4  Cell Undervoltage Protection
    5. 6.5  Short Circuit in Discharge Protection
    6. 6.6  Overcurrent in Charge Protection
    7. 6.7  Overcurrent in Discharge 1 and 2 Protections
    8. 6.8  Current Protection Latch
    9. 6.9  CHG Detector
    10. 6.10 Overtemperature in Charge Protection
    11. 6.11 Overtemperature in Discharge Protection
    12. 6.12 Internal Overtemperature Protection
    13. 6.13 Undertemperature in Charge Protection
    14. 6.14 Undertemperature in Discharge Protection
    15. 6.15 Host Watchdog Protection
    16. 6.16 Cell Open Wire Detection
    17. 6.17 Voltage Reference Measurement Diagnostic Protection
    18. 6.18 VSS Measurement Diagnostic Protection
    19. 6.19 REGOUT Diagnostic Protection
    20. 6.20 LFO Oscillator Integrity Diagnostic Protection
    21. 6.21 Internal Factory Trim Diagnostic Protection
  9. Device Status and Controls
    1. 7.1 0x00 Control Status() and 0x12 Battery Status() Commands
    2. 7.2 LDOs
    3. 7.3 ALERT Pin Operation
    4. 7.4 TS Pin Operation
    5. 7.5 Programmable Timer
    6. 7.6 Device Event Timing
  10. Operational Modes
    1. 8.1 Overview of Operational Modes
    2. 8.2 NORMAL Mode
    3. 8.3 SLEEP Mode
    4. 8.4 DEEPSLEEP Mode
    5. 8.5 SHUTDOWN Mode
    6. 8.6 CONFIG_UPDATE Mode
  11. I2C Serial Communications
    1. 9.1 I2C Serial Communications Interface
  12. 10Cell Balancing
    1. 10.1 Cell Balancing
  13. 11Commands and Subcommands
    1. 11.1 Direct Commands
    2. 11.2 Bit field Definitions for Direct Commands
      1. 11.2.1  Safety Alert A Register
      2. 11.2.2  Safety Status A Register
      3. 11.2.3  Safety Alert B Register
      4. 11.2.4  Safety Status B Register
      5. 11.2.5  Battery Status Register
      6. 11.2.6  Alarm Status Register
      7. 11.2.7  Alarm Raw Status Register
      8. 11.2.8  Alarm Enable Register
      9. 11.2.9  FET CONTROL Register
      10. 11.2.10 REGOUT CONTROL Register
      11. 11.2.11 DSG FET Driver PWM Control Register
      12. 11.2.12 CHG FET Driver PWM Control Register
    3. 11.3 Command-only Subcommands
    4. 11.4 Subcommands with Data
    5. 11.5 Bit field Definitions for Subcommands
      1. 11.5.1 DEVICE NUMBER Register
      2. 11.5.2 FW VERSION Register
      3. 11.5.3 HW VERSION Register
      4. 11.5.4 SECURITY KEYS Register
      5. 11.5.5 CB ACTIVE CELLS Register
      6. 11.5.6 PROG TIMER Register
      7. 11.5.7 PROT RECOVERY Register
  14. 12Data Memory
    1. 12.1 Calibration
      1. 12.1.1 Calibration:Voltage
        1. 12.1.1.1 Calibration:Voltage:Cell 1 Gain
        2. 12.1.1.2 Calibration:Voltage:Cell 2 Gain Delta
        3. 12.1.1.3 Calibration:Voltage:Cell 3 Gain Delta
        4. 12.1.1.4 Calibration:Voltage:Cell 4 Gain Delta
        5. 12.1.1.5 Calibration:Voltage:Cell 5 Gain Delta
        6. 12.1.1.6 Calibration:Voltage:Stack Gain
      2. 12.1.2 Calibration:Current
        1. 12.1.2.1 Calibration:Current:Curr Gain
        2. 12.1.2.2 Calibration:Current:Curr Offset
        3. 12.1.2.3 Calibration:Current:CC1 Gain
        4. 12.1.2.4 Calibration:Current:CC1 Offset
      3. 12.1.3 Calibration:Temperature
        1. 12.1.3.1 Calibration:Temperature:TS Offset
        2. 12.1.3.2 Calibration:Temperature:Int Temp Gain
        3. 12.1.3.3 Calibration:Temperature:Int Temp Offset
    2. 12.2 Settings
      1. 12.2.1 Settings:Configuration
        1. 12.2.1.1 Settings:Configuration:Power Config
        2. 12.2.1.2 Settings:Configuration:REGOUT Config
        3. 12.2.1.3 Settings:Configuration:I2C Address
        4. 12.2.1.4 Settings:Configuration:I2C Config
        5. 12.2.1.5 Settings:Configuration:DA Config
        6. 12.2.1.6 Settings:Configuration:Vcell Mode
        7. 12.2.1.7 Settings:Configuration:Default Alarm Mask
        8. 12.2.1.8 Settings:Configuration:FET Options
        9. 12.2.1.9 Settings:Configuration:Charge Detector Time
      2. 12.2.2 Settings:Cell Balancing
        1. 12.2.2.1 Settings:Cell Balancing:Balancing Configuration
        2. 12.2.2.2 Settings:Cell Balancing:Min Temp Threshold
        3. 12.2.2.3 Settings:Cell Balancing:Max Temp Threshold
        4. 12.2.2.4 Settings:Cell Balancing:Max Internal Temp
      3. 12.2.3 Settings:Protection
        1. 12.2.3.1 Settings:Protection:Enabled Protections A
        2. 12.2.3.2 Settings:Protection:Enabled Protections B
        3. 12.2.3.3 Settings:Protection:DSG FET Protections A
        4. 12.2.3.4 Settings:Protection:CHG FET Protections A
        5. 12.2.3.5 Settings:Protection:Both FET Protections B
        6. 12.2.3.6 Settings:Protection:Body Diode Threshold
        7. 12.2.3.7 Settings:Protection:Cell Open Wire NORMAL Check Time
        8. 12.2.3.8 Settings:Protection:Cell Open Wire SLEEP Check Time
        9. 12.2.3.9 Settings:Protection:Host Watchdog Timeout
    3. 12.3 Protections
      1. 12.3.1 Protections:Cell Voltage
        1. 12.3.1.1 Protections:Cell Voltage:Cell Undervoltage Protection Threshold
        2. 12.3.1.2 Protections:Cell Voltage:Cell Undervoltage Protection Delay
        3. 12.3.1.3 Protections:Cell Voltage:Cell Undervoltage Protection Recovery Hysteresis
        4. 12.3.1.4 Protections:Cell Voltage:Cell Overvoltage Protection Threshold
        5. 12.3.1.5 Protections:Cell Voltage:Cell Overvoltage Protection Delay
        6. 12.3.1.6 Protections:Cell Voltage:Cell Overvoltage Protection Recovery Hysteresis
      2. 12.3.2 Protections:Current
        1. 12.3.2.1  Protections:Current:Overcurrent in Charge Protection Threshold
        2. 12.3.2.2  Protections:Current:Overcurrent in Charge Protection Delay
        3. 12.3.2.3  Protections:Current:Overcurrent in Discharge 1 Protection Threshold
        4. 12.3.2.4  Protections:Current:Overcurrent in Discharge 1 Protection Delay
        5. 12.3.2.5  Protections:Current:Overcurrent in Discharge 2 Protection Threshold
        6. 12.3.2.6  Protections:Current:Overcurrent in Discharge 2 Protection Delay
        7. 12.3.2.7  Protections:Current:Short Circuit in Discharge Protection Threshold
        8. 12.3.2.8  Protections:Current:Short Circuit in Discharge Protection Delay
        9. 12.3.2.9  Protections:Current:Latch Limit
        10. 12.3.2.10 Protections:Current:Recovery Time
      3. 12.3.3 Protections:Temperature
        1. 12.3.3.1  Protections:Temperature:Overtemperature in Charge Protection Threshold
        2. 12.3.3.2  Protections:Temperature:Overtemperature in Charge Protection Delay
        3. 12.3.3.3  Protections:Temperature:Overtemperature in Charge Protection Recovery
        4. 12.3.3.4  Protections:Temperature:Undertemperature in Charge Protection Threshold
        5. 12.3.3.5  Protections:Temperature:Undertemperature in Charge Protection Delay
        6. 12.3.3.6  Protections:Temperature:Undertemperature in Charge Protection Recovery
        7. 12.3.3.7  Protections:Temperature:Overtemperature in Discharge Protection Threshold
        8. 12.3.3.8  Protections:Temperature:Overtemperature in Discharge Protection Delay
        9. 12.3.3.9  Protections:Temperature:Overtemperature in Discharge Protection Recovery
        10. 12.3.3.10 Protections:Temperature:Undertemperature in Discharge Protection Threshold
        11. 12.3.3.11 Protections:Temperature:Undertemperature in Discharge Protection Delay
        12. 12.3.3.12 Protections:Temperature:Undertemperature in Discharge Protection Recovery
        13. 12.3.3.13 Protections:Temperature:Internal Overtemperature Protection Threshold
        14. 12.3.3.14 Protections:Temperature:Internal Overtemperature Protection Delay
        15. 12.3.3.15 Protections:Temperature:Internal Overtemperature Protection Recovery
    4. 12.4 Power
      1. 12.4.1 Power:Sleep
        1. 12.4.1.1 Power:Sleep:Sleep Current
        2. 12.4.1.2 Power:Sleep:Voltage Time
        3. 12.4.1.3 Power:Sleep:Wake Comparator Current
      2. 12.4.2 Power:Shutdown
        1. 12.4.2.1 Power:Shutdown:Shutdown Cell Voltage
        2. 12.4.2.2 Power:Shutdown:Shutdown Stack Voltage
        3. 12.4.2.3 Power:Shutdown:Shutdown Temperature
        4. 12.4.2.4 Power:Shutdown:Auto Shutdown Time
    5. 12.5 Security
      1. 12.5.1 Security:Settings
        1. 12.5.1.1 Security:Settings:Security Settings
        2. 12.5.1.2 Security:Settings:Full Access Key Step 1
        3. 12.5.1.3 Security:Settings:Full Access Key Step 2
    6. 12.6 Data Memory Summary
  15. 13Revision History

Coulomb Counter and Digital Filters

The BQ76905 device monitors pack current using a low-side sense resistor that connects to the SRP and SRN pins through an external RC filter, which must be connected such that a charging current creates a positive voltage on SRP relative to SRN. The device supports a wide range of sense resistor values, such as 1 mΩ or below. The differential voltage between SRP and SRN is digitized by a dedicated integrated coulomb counter ADC, which can digitize voltages over a ±200 mV range. The pins can also support higher positive voltages relative to VSS, which can occur during overcurrent or short circuit in discharge conditions, without damage to the device, although the current is not accurately digitized in this case.

Current Measurement Data

The coulomb counter provides two digital outputs, one of which uses the CC2 digital filter, which generates a 24-bit raw output. The timing and resolution of the CC2 output is programmable, with the output rate also affecting the resolution of the conversion. The effective resolution (defined as the resolution such that the data exhibits 1-sigma variation with ±1 LSB) of the coulomb counter conversions increases with longer conversion time. The conversion time options when the coulomb counter is in full power mode are 366 μs (which results in 13-bit effective resolution), 732 μs (14-bit effective resolution), 1.46 ms (15-bit effective resolution), or 2.93 ms (16-bit effective resolution). This conversion time is set using the Settings:Configuration:DA Config[IADCSPEED1:0] configuration bits. In addition, the coulomb counter supports a low power mode, which operates at a 16 times slower rate than the settings listed above, with similar resolution performance at each setting, but with supply current reduced by approximately 55 μA.

This 24-bit CC2 value is reported in the 0x36 Raw Current() command. This command provides 24 bits of data in the LSBs, which is sign-extended to generate the upper 8 bits of the 32-bit field. While this data provides additional resolution for current measurement if desired,there can be considerable noise in the lower bits, so the data might need further filtering by the host before use. The 32-bit current data has an LSB value of approximately VREF2 / (5 × 223) ≅ 1.227 V / (5 × 223) ≅ 29 nV. Note that the data provided by the 0x36 Raw Current() command is not processed for offset or gain correction.

The 24-bit raw coulomb counter output is further processed, with the result reported in 16-bit format by the 0x3A Current() command in units of 16-bit userA. The processing consists of first subtracting an offset value (Calibration:Current:Curr Offset) from the 24-bit raw ADC result, then multiplying that result by a gain factor (Calibration:Current:Curr Gain), dividing the result by 8192, and rounding to 16-bits. The default values of Calibration:Current:Curr Offset and Calibration:Current:Curr Gain are trimmed and stored in OTP by TI during manufacturing to provide the final value of 0x3A Current() in units of mA, assuming a 1 mΩ sense resistor is used. The device loads the trim values to use during operation; the values in use can also be modified by the host in CONFIG_UPDATE mode if desired.

If a different sense resistor value is used, the host can modify the value of Calibration:Current:Curr Gain to adjust the units of the 0x3A Current() command, depending on the range of currents expected in the system. Thus the units of each LSB are termed "userA" based on the gain setting. Since the 0x3A Current() command reports signed 16-bit data, units of mA would only allow reporting of currents between -32768 mA and +32767 mA. If larger currents are expected, then the gain can be adjusted to set the LSB userA to a different value, such as 10 mA or 100 mA, which then allows reporting of currents between -327.68 A and +327.67 A (if userA = 10 mA) or between -3276.8 A and +3276.7 A (if userA = 100 mA).

The device also reports a 16-bit current which is measured primarily for charge integration purposes in 0x3C CC1 Current(), with units adjustable in similar fashion as the 0x3A Current(). In this case, the raw data is 16-bit, so the processing consists of first subtracting an offset value (Calibration:Current:CC1 Offset / 256) from the 16-bit raw ADC result, then multiplying that result by a gain factor (Calibration:Current:CC1 Gain), dividing the result by 32, and rounding to 16-bits. The default values of Calibration:Current:CC1 Offset and Calibration:Current:CC1 Gain are trimmed and stored in OTP by TI during manufacturing to provide the final value of 0x3C CC1 Current() in units of mA, assuming a 1 mΩ sense resistor is used. The device loads the trim values to use during operation; the values in use can also be modified by the host in CONFIG_UPDATE mode if desired.

The 0x3C CC1 Current() only operates in NORMAL mode, and generates a sample every 250 ms when the coulomb counter is in full power mode, or every 4 seconds in low power mode (as determined by the Settings:Configuration:DA Config[CCMODE1:0] setting). The 0x3C CC1 Current() is used to decide when the device enters SLEEP mode and for accumulated charge integration.

Body Diode Protection

The BQ76905 supports both series and parallel FET configurations. When the CHG and DSG FETs are in series, current can flow through the body diode of a disabled FET when the other FET is enabled. In this configuration, body diode protection is used to turn the disabled FET on when current above a threshold is detected to be flowing through that FET. When the system has separate DSG and CHG paths and parallel FETs, body diode protection is not needed and can be disabled by clearing the Settings:Configuration:FET Options[SFET] configuration bit.

The body diode protection is implemented in most cases using the digitized current data from the coulomb counter. Except for special cases, the device compares the absolute value of 0x3A Current() to the body diode protection threshold given by Settings:Protection:Body Diode Threshold. If one FET is disabled and one is enabled, and the absolute value of 0x3A Current() exceeds the threshold, and [SFET] = 0x1, then the disabled FET is enabled.

If Settings:Configuration:DA Config[CCMODE1:0] = 0x3, then the body diode protection instead uses the wake detector signal to decide whether or not to enable the disabled FET. This means the device uses the wake detector threshold for the body diode protection in these cases, so Settings:Protection:Body Diode Threshold is not used.

In order to avoid rapid cycling of a FET driver when the current is near the threshold, the FET enabled by body diode protection is not disabled again due to unneeded body diode protection until after a hysteresis time of approximately 240 ms has passed since the FET was initially enabled. This hysteresis does not apply if a protection fault occurs and the device is configured to disable the FET, or if a command to manually disable the FET is sent. In these cases the FET turns off immediately without observing the hysteresis.

Current Measurement Schedule

The schedule for current measurements depends on programmable settings as well as the operating mode of the device (such as whether the device is in SLEEP mode versus NORMAL mode). This programmability, which uses the Settings:Configuration:DA Config[CCMODE1:0], allows the power dissipation of the device to be reduced if fast current measurements are not required in the system.

Table 5-9 Coulomb Counter Mode Control (Settings:Configuration:DA Config[CCMODE1:0])
CCMODE[1] CCMODE[0] Description
0 0

NORMAL mode: Coulomb counter runs continuously, independent of the LOOP_SLOW or CB_LOOP_SLOW setting.

SLEEP mode: Coulomb counter runs continuously while the voltage ADC is running in SLEEP mode during a burst measurement. It stops at the conclusion of the CC2 measurement underway when the burst measurement completes.

Startup mode (at initial powerup from SHUTDOWN or exit of DEEPSLEEP or CONFIG_UPDATE mode): Coulomb counter runs continuously while the voltage ADC is running during the Startup Sequence. It stops at the conclusion of the CC2 measurement underway when the Startup Sequence completes.

0x3C CC1 Current() and accumulated charge and time integration are updated in NORMAL mode but not in SLEEP mode.

Body diode protection uses the coulomb counter CC2 digitized current data.

0 1

NORMAL mode: Coulomb counter runs continuously if LOOP_SLOW or CB_LOOP_SLOW is set to the fastest setting. When these parameters are modified to slower settings, the device inserts 1, 3, or 7 idle slots between each current measurement slot, thereby reducing the average output rate of the current measurements.

SLEEP mode: Coulomb counter runs continuously while the voltage ADC is running in SLEEP mode during a burst measurement. It stops at the conclusion of the CC2 measurement underway when the burst measurement completes.

Startup mode (at initial powerup from SHUTDOWN or exit of DEEPSLEEP or CONFIG_UPDATE mode): Coulomb counter runs continuously while the voltage ADC is running during the Startup Sequence. It stops at the conclusion of the CC2 measurement underway when the Startup Sequence completes.

0x3C CC1 Current() and accumulated charge and time integration are only updated when in NORMAL and not using a mode that inserts idle slots into the voltage measurement schedule. These are not updated in SLEEP mode.

Body diode protection uses the coulomb counter CC2 digitized current data.

1 0

NORMAL mode: Coulomb counter runs continuously in low power mode (CC1 and CC2 measurements take 16x longer versus in regular full power mode)

SLEEP mode: Coulomb counter takes one CC2 measurement at the beginning of each burst measurement using low power mode.

Startup mode (at initial powerup from SHUTDOWN or exit of DEEPSLEEP): Coulomb counter takes one CC2 measurement using low power mode at the beginning of the Startup Sequence.

0x3C CC1 Current() and accumulated charge and time integration are only updated with this setting while in NORMAL mode, they are not updated in SLEEP mode. The 0x3C CC1 Current() and charge integration is updated every approximately 4 seconds in NORMAL mode using this setting, due to the slower clock rate. The charge integration scales the CC1 Current appropriately when accumulating, to maintain the same units of userA-seconds.

Body diode protection uses the coulomb counter CC2 digitized current data.

1 1

Coulomb counter is powered down and does not operate at all. This provides a low power mode if current measurement is not needed. 0x3C CC1 Current() and accumulated charge and time integration are not available in this mode.

In this mode, body diode protection is based on the wake comparator detection threshold, which also serves as the detector to enter/exit SLEEP mode.

Charge Integration

When the 0x3C CC1 Current() is operating, it is integrated to calculate the accumulated passed charge, with the integrated charge available as a signed 48-bit value from the 0x0004 PASSQ() subcommand. The first 32-bits contains the 32 LSBs of the accumulated charge in units of userA-seconds, and the next 32-bits contain the upper 16 bits of the 48-bit result sign-extended to fill the 32-bit field. In addition, a timer value with units of 250 ms is available in a 32-bit value from the subcommand, which counts the time the device is in NORMAL mode since the integrator was reset. Neither the time nor the charge integration operate in SLEEP, DEEPSLEEP, or SHUTDOWN modes, only in NORMAL mode and based on the setting of Settings:Configuration:DA Config[CCMODE1:0]. The integrator and timer is reset by sending the 0x0005 RESET_PASSQ() subcommand. These are also reset upon entering CONFIG_UPDATE mode. When the coulomb counter is in low power mode, it only generates a CC1 current output every 4 seconds, so the charge and time integration is also updated at these intervals. The integration of 0x3C CC1 Current() is scaled accordingly when in low power mode, to provide accumulated charge using the same units of userA-seconds as in full power mode.

Table 5-10 Accumulated Charge and Time (from PASSQ() subcommand)
Subcommand Address Bytes within Block Name Units
0x0004 0 - 3 Accumulated charge lower 32-bits (little-endian) Lower 32 bits of signed 48-bit result, with the full 48-bit field having units of userA-seconds
4 - 7 Accumulated charge upper 16-bits sign-extended to a 32-bit field (little-endian) Upper bits of signed 48-bit result, with the full 48-bit field having units of userA-seconds
8 - 11 Accumulated Time (little-endian) 32-bit unsigned integer in units of 250 ms