SLUUCI8 November   2023 BQ76905

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Battery Notational Conventions
    3.     Trademarks
    4.     Glossary
  3. Introduction
  4. Device Description
    1. 2.1 Overview
    2. 2.2 Functional Block Diagram
  5. Device Configuration
    1. 3.1 Direct Commands and Subcommands
    2. 3.2 Configuration Using OTP or Registers
    3. 3.3 Data Formats
      1. 3.3.1 Unsigned Integer
      2. 3.3.2 Integer
      3. 3.3.3 Hex
  6. Device Security
  7. Measurement Subsystem
    1. 5.1 Voltage Measurement
      1. 5.1.1 Voltage Measurement Schedule
      2. 5.1.2 Unused VC Cell Input Pins
      3. 5.1.3 General Purpose ADCIN Functionality
    2. 5.2 Coulomb Counter and Digital Filters
    3. 5.3 Internal Temperature Measurement
    4. 5.4 Thermistor Temperature Measurement
    5. 5.5 Measurement Calibration
  8. Protection Subsystem
    1. 6.1  Protections Overview
    2. 6.2  Protection FET Drivers
    3. 6.3  Cell Overvoltage Protection
    4. 6.4  Cell Undervoltage Protection
    5. 6.5  Short Circuit in Discharge Protection
    6. 6.6  Overcurrent in Charge Protection
    7. 6.7  Overcurrent in Discharge 1 and 2 Protections
    8. 6.8  Current Protection Latch
    9. 6.9  CHG Detector
    10. 6.10 Overtemperature in Charge Protection
    11. 6.11 Overtemperature in Discharge Protection
    12. 6.12 Internal Overtemperature Protection
    13. 6.13 Undertemperature in Charge Protection
    14. 6.14 Undertemperature in Discharge Protection
    15. 6.15 Host Watchdog Protection
    16. 6.16 Cell Open Wire Detection
    17. 6.17 Voltage Reference Measurement Diagnostic Protection
    18. 6.18 VSS Measurement Diagnostic Protection
    19. 6.19 REGOUT Diagnostic Protection
    20. 6.20 LFO Oscillator Integrity Diagnostic Protection
    21. 6.21 Internal Factory Trim Diagnostic Protection
  9. Device Status and Controls
    1. 7.1 0x00 Control Status() and 0x12 Battery Status() Commands
    2. 7.2 LDOs
    3. 7.3 ALERT Pin Operation
    4. 7.4 TS Pin Operation
    5. 7.5 Programmable Timer
    6. 7.6 Device Event Timing
  10. Operational Modes
    1. 8.1 Overview of Operational Modes
    2. 8.2 NORMAL Mode
    3. 8.3 SLEEP Mode
    4. 8.4 DEEPSLEEP Mode
    5. 8.5 SHUTDOWN Mode
    6. 8.6 CONFIG_UPDATE Mode
  11. I2C Serial Communications
    1. 9.1 I2C Serial Communications Interface
  12. 10Cell Balancing
    1. 10.1 Cell Balancing
  13. 11Commands and Subcommands
    1. 11.1 Direct Commands
    2. 11.2 Bit field Definitions for Direct Commands
      1. 11.2.1  Safety Alert A Register
      2. 11.2.2  Safety Status A Register
      3. 11.2.3  Safety Alert B Register
      4. 11.2.4  Safety Status B Register
      5. 11.2.5  Battery Status Register
      6. 11.2.6  Alarm Status Register
      7. 11.2.7  Alarm Raw Status Register
      8. 11.2.8  Alarm Enable Register
      9. 11.2.9  FET CONTROL Register
      10. 11.2.10 REGOUT CONTROL Register
      11. 11.2.11 DSG FET Driver PWM Control Register
      12. 11.2.12 CHG FET Driver PWM Control Register
    3. 11.3 Command-only Subcommands
    4. 11.4 Subcommands with Data
    5. 11.5 Bit field Definitions for Subcommands
      1. 11.5.1 DEVICE NUMBER Register
      2. 11.5.2 FW VERSION Register
      3. 11.5.3 HW VERSION Register
      4. 11.5.4 SECURITY KEYS Register
      5. 11.5.5 CB ACTIVE CELLS Register
      6. 11.5.6 PROG TIMER Register
      7. 11.5.7 PROT RECOVERY Register
  14. 12Data Memory
    1. 12.1 Calibration
      1. 12.1.1 Calibration:Voltage
        1. 12.1.1.1 Calibration:Voltage:Cell 1 Gain
        2. 12.1.1.2 Calibration:Voltage:Cell 2 Gain Delta
        3. 12.1.1.3 Calibration:Voltage:Cell 3 Gain Delta
        4. 12.1.1.4 Calibration:Voltage:Cell 4 Gain Delta
        5. 12.1.1.5 Calibration:Voltage:Cell 5 Gain Delta
        6. 12.1.1.6 Calibration:Voltage:Stack Gain
      2. 12.1.2 Calibration:Current
        1. 12.1.2.1 Calibration:Current:Curr Gain
        2. 12.1.2.2 Calibration:Current:Curr Offset
        3. 12.1.2.3 Calibration:Current:CC1 Gain
        4. 12.1.2.4 Calibration:Current:CC1 Offset
      3. 12.1.3 Calibration:Temperature
        1. 12.1.3.1 Calibration:Temperature:TS Offset
        2. 12.1.3.2 Calibration:Temperature:Int Temp Gain
        3. 12.1.3.3 Calibration:Temperature:Int Temp Offset
    2. 12.2 Settings
      1. 12.2.1 Settings:Configuration
        1. 12.2.1.1 Settings:Configuration:Power Config
        2. 12.2.1.2 Settings:Configuration:REGOUT Config
        3. 12.2.1.3 Settings:Configuration:I2C Address
        4. 12.2.1.4 Settings:Configuration:I2C Config
        5. 12.2.1.5 Settings:Configuration:DA Config
        6. 12.2.1.6 Settings:Configuration:Vcell Mode
        7. 12.2.1.7 Settings:Configuration:Default Alarm Mask
        8. 12.2.1.8 Settings:Configuration:FET Options
        9. 12.2.1.9 Settings:Configuration:Charge Detector Time
      2. 12.2.2 Settings:Cell Balancing
        1. 12.2.2.1 Settings:Cell Balancing:Balancing Configuration
        2. 12.2.2.2 Settings:Cell Balancing:Min Temp Threshold
        3. 12.2.2.3 Settings:Cell Balancing:Max Temp Threshold
        4. 12.2.2.4 Settings:Cell Balancing:Max Internal Temp
      3. 12.2.3 Settings:Protection
        1. 12.2.3.1 Settings:Protection:Enabled Protections A
        2. 12.2.3.2 Settings:Protection:Enabled Protections B
        3. 12.2.3.3 Settings:Protection:DSG FET Protections A
        4. 12.2.3.4 Settings:Protection:CHG FET Protections A
        5. 12.2.3.5 Settings:Protection:Both FET Protections B
        6. 12.2.3.6 Settings:Protection:Body Diode Threshold
        7. 12.2.3.7 Settings:Protection:Cell Open Wire NORMAL Check Time
        8. 12.2.3.8 Settings:Protection:Cell Open Wire SLEEP Check Time
        9. 12.2.3.9 Settings:Protection:Host Watchdog Timeout
    3. 12.3 Protections
      1. 12.3.1 Protections:Cell Voltage
        1. 12.3.1.1 Protections:Cell Voltage:Cell Undervoltage Protection Threshold
        2. 12.3.1.2 Protections:Cell Voltage:Cell Undervoltage Protection Delay
        3. 12.3.1.3 Protections:Cell Voltage:Cell Undervoltage Protection Recovery Hysteresis
        4. 12.3.1.4 Protections:Cell Voltage:Cell Overvoltage Protection Threshold
        5. 12.3.1.5 Protections:Cell Voltage:Cell Overvoltage Protection Delay
        6. 12.3.1.6 Protections:Cell Voltage:Cell Overvoltage Protection Recovery Hysteresis
      2. 12.3.2 Protections:Current
        1. 12.3.2.1  Protections:Current:Overcurrent in Charge Protection Threshold
        2. 12.3.2.2  Protections:Current:Overcurrent in Charge Protection Delay
        3. 12.3.2.3  Protections:Current:Overcurrent in Discharge 1 Protection Threshold
        4. 12.3.2.4  Protections:Current:Overcurrent in Discharge 1 Protection Delay
        5. 12.3.2.5  Protections:Current:Overcurrent in Discharge 2 Protection Threshold
        6. 12.3.2.6  Protections:Current:Overcurrent in Discharge 2 Protection Delay
        7. 12.3.2.7  Protections:Current:Short Circuit in Discharge Protection Threshold
        8. 12.3.2.8  Protections:Current:Short Circuit in Discharge Protection Delay
        9. 12.3.2.9  Protections:Current:Latch Limit
        10. 12.3.2.10 Protections:Current:Recovery Time
      3. 12.3.3 Protections:Temperature
        1. 12.3.3.1  Protections:Temperature:Overtemperature in Charge Protection Threshold
        2. 12.3.3.2  Protections:Temperature:Overtemperature in Charge Protection Delay
        3. 12.3.3.3  Protections:Temperature:Overtemperature in Charge Protection Recovery
        4. 12.3.3.4  Protections:Temperature:Undertemperature in Charge Protection Threshold
        5. 12.3.3.5  Protections:Temperature:Undertemperature in Charge Protection Delay
        6. 12.3.3.6  Protections:Temperature:Undertemperature in Charge Protection Recovery
        7. 12.3.3.7  Protections:Temperature:Overtemperature in Discharge Protection Threshold
        8. 12.3.3.8  Protections:Temperature:Overtemperature in Discharge Protection Delay
        9. 12.3.3.9  Protections:Temperature:Overtemperature in Discharge Protection Recovery
        10. 12.3.3.10 Protections:Temperature:Undertemperature in Discharge Protection Threshold
        11. 12.3.3.11 Protections:Temperature:Undertemperature in Discharge Protection Delay
        12. 12.3.3.12 Protections:Temperature:Undertemperature in Discharge Protection Recovery
        13. 12.3.3.13 Protections:Temperature:Internal Overtemperature Protection Threshold
        14. 12.3.3.14 Protections:Temperature:Internal Overtemperature Protection Delay
        15. 12.3.3.15 Protections:Temperature:Internal Overtemperature Protection Recovery
    4. 12.4 Power
      1. 12.4.1 Power:Sleep
        1. 12.4.1.1 Power:Sleep:Sleep Current
        2. 12.4.1.2 Power:Sleep:Voltage Time
        3. 12.4.1.3 Power:Sleep:Wake Comparator Current
      2. 12.4.2 Power:Shutdown
        1. 12.4.2.1 Power:Shutdown:Shutdown Cell Voltage
        2. 12.4.2.2 Power:Shutdown:Shutdown Stack Voltage
        3. 12.4.2.3 Power:Shutdown:Shutdown Temperature
        4. 12.4.2.4 Power:Shutdown:Auto Shutdown Time
    5. 12.5 Security
      1. 12.5.1 Security:Settings
        1. 12.5.1.1 Security:Settings:Security Settings
        2. 12.5.1.2 Security:Settings:Full Access Key Step 1
        3. 12.5.1.3 Security:Settings:Full Access Key Step 2
    6. 12.6 Data Memory Summary
  15. 13Revision History

Cell Balancing

The BQ76905 supports passive cell balancing by bypassing the current of a selected cell during charging or at rest, using either integrated bypass switches between cells, or external bypass FETs or BJTs. Balancing must be initiated and controlled manually from a host processor.

Adjacent as well as non-adjacent cells can be balanced. Balancing is controlled using the 0x0083 CB_ACTIVE_CELLS() subcommand sent by the host. When balancing is initiated using this subcommand, the device starts a timer and begins balancing the specified cells for up to 20 seconds. The timer is reset if a new balancing subcommand is issued. This is included as a precaution, in case the host processor initiated balancing but then stopped communication with the BQ76905, so that balancing does not continue indefinitely. The host can write 0x00 to the subcommand to disable balancing. When this subcommand is read, it reports a bit mask of which cells are being actively balanced.

The 0x0083 CB_ACTIVE_CELLS() subcommand is accessible in SEALED mode, to avoid the need for the pack to be unsealed in the field in order to initiate balancing. If balancing is not used, writes to this subcommand can be disabled by setting the Settings:Cell Balancing:Balancing Configuration[CB_NO_CMD] configuration bit.

The device disables balancing if the ADC measurement of a thermistor (if the TS pin is configured for thermistor measurement) is above Settings:Cell Balancing:Min Temp Threshold (the threshold for the minimum temperature) or below Settings:Cell Balancing:Max Temp Threshold (the threshold for the maximum temperature) or the internal die temperature of the device exceeds a programmable threshold set by Settings:Cell Balancing:Max Internal Temp. However, the customer must still carefully analyze the thermal effect of the balancing on the device in system. Based on the planned ambient temperature of the device during operation and the thermal properties of the package, the maximum power must be calculated that can be dissipated within the device and still ensure operation remains within the recommended operating temperature range. The cell balancing configuration can then be determined such that the device power remains below this level by reducing the number of cells being balanced simultaneously, or by reducing the balancing current of each cell by appropriate selection of the external resistance in series with each cell.

Cell Balancing Timing

Due to the current that flows into the cell input pins on the BQ76905 while balancing is active, cell voltage measurements cannot be made without disabling balancing temporarily. Therefore, the timing for measurement of cell voltages and evaluation of cell voltage protections by the device is modified during balancing. While balancing of any cell is active, the balancing FETs are disabled temporarily during each ADSCAN while the cell voltages are being measured, as well as during the Shared Slot measurement.

In order to meet the need for regular measurements while cell balancing is underway, the Settings:Configuration:Power Config[CB_LOOP_SLOW[1:0]] configuration bits modify the cell voltage measurement timing when cell balancing is active, to increase the average balancing current. This modification involves replacing the measurements in selected ADSCANs with idle slots of the same width, to allow balancing to remain active a higher percentage of the time.

If CB_LOOP_SLOW[1:0] = 0b00, the voltage measurements in every other ADSCAN are replaced with idle slots of the same time duration. This allows balancing to be enabled during an entire "idle" ADSCAN. Balancing remains off during the "active" ADSCAN when voltage measurements are enabled. Therefore this setting allows balancing to be enabled almost 50% of the time (balancing is disabled one slot before any voltage measurement, thus is off for all slots of the "active" ADSCAN and for one slot in the "idle" ADSCAN just before the "active" ADSCAN begins).

If CB_LOOP_SLOW[1:0] = 0b01, the voltage measurements in three of every four ADSCANs are replaced with idle slots of the same time duration. This allows balancing to be enabled during each "idle" ADSCAN. Balancing remains off during the "active" ADSCAN that still has voltage measurements enabled. Therefore this setting allows balancing to be enabled approximately 75% of the time (balancing is disabled one slot before any voltage measurement, thus is off for all slots of the "active" ADSCAN and for one slot in the "idle" ADSCAN just before the "active" ADSCAN).

If CB_LOOP_SLOW[1:0] = 0b10, the voltage measurements in seven of every eight ADSCANs are replaced with idle slots of the same time duration. This allows balancing to be enabled during each "idle" ADSCAN. Balancing remains off during the "active" ADSCAN that still has voltage measurements enabled. Therefore this setting allows balancing to be enabled approximately 87% of the time (balancing is disabled one slot before any voltage measurement, thus is off for all slots of the "active" ADSCAN and for one slot in the "idle" ADSCAN just before the "active" ADSCAN).

If CB_LOOP_SLOW[1:0] = 0b11, the voltage measurements in 15 of every 16 ADSCANs are replaced with idle slots of the same time duration. This allows balancing to be enabled during each "idle" ADSCAN. Balancing remains off during the "active" ADSCAN that still has voltage measurements enabled. Therefore this setting allows balancing to be enabled approximately 92% of the time (balancing is disabled one slot before any voltage measurement, thus is off for all slots of the "active" ADSCAN and for one slot in the "idle" ADSCAN just before the "active" ADSCAN).

The timing of COV and CUV protection checks that use cell voltage measurement data is also modified due to the reduced frequency of measurements.

When a command is sent to initiate cell balancing, the device first completes any ADSCAN presently in operation before it enables balancing.

Table 10-1 Cell Balancing Loop Slow Down Settings
CB_LOOP_SLOW[1]CB_LOOP_SLOW[0]Description
00Measurements are skipped in one of every two ADSCANs.
01Measurements are skipped in three of every four ADSCANs.
10Measurements are skipped in seven of every eight ADSCANs.
11Measurements are skipped in 15 of every 16 ADSCANs.

The LOOP_SLOW and CB_LOOP_SLOW settings operate independently. The LOOP_SLOW setting determines the speed of the regular measurement loop while balancing is not active. The CB_LOOP_SLOW setting determines the speed of the regular measurement loop only while balancing is active (the two settings do not combine together during balancing).

If a CUV or COV alert is detected while balancing is active, the device immediately disables balancing, and the schedule returns to the original NORMAL mode schedule.

While balancing is active, the device remains in NORMAL mode and does not enter SLEEP mode. If the device is in SLEEP mode and a command is sent to start balancing, the device first transitions to NORMAL mode. Commands to start balancing while the device is in DEEPSLEEP are ignored. When the device enters DEEPSLEEP mode, any balancing underway is terminated.

When the 0x0083 CB_ACTIVE_CELLS() subcommand is sent, the intended cells to be balanced can be read back, even though the balancing has not started yet (it starts at the end of the in-progress ADSCAN). This allows the host to confirm the command sent was accepted by the device. When balancing actually begins, the 0x64 AlarmRawStatus()[CB] bit is asserted, and it is deasserted when balancing is disabled. So this can be monitored for more precise timing on when the balancing FET is enabled and disabled. Note that this bit does not reflect the brief time periods when balancing is disabled to allow measurements to run; it continues to be asserted during these periods.

At the time cell balancing is disabled (either indefinitely or periodically to allow regular cell voltage measurements), there is a voltage transient generated that can affect several nearby cell input pins, due to the resistor and capacitor network at those pins. If a cell measurement occurs too quickly after cell balancing has been disabled, the accuracy of the cell voltage measurement can be impacted. In order to address this potential issue, the device includes a programmable delay implemented each time cell balancing is disabled before any cell voltage measurements are taken. This delay is set by Settings:Cell Balancing:Balancing Configuration[CBDLY2:0] from zero to 64 ms. This delay increases the time between successive active measurement loops.