SLUUCJ0 November 2023 BQ76907
The BQ76907 includes functionality to generate an alarm signal at the ALERT pin, which can be used as an interrupt to a host processor. The ALERT pin is an open-drain pin that is pulled low by the device whenever an alarm signal is generated. The alarm signal is an OR of all bits in the 0x62 Alarm Status() result. The alarm function includes a programmable mask (set using 0x66 Alarm Enable()), to allow the customer to decide which flags or events can trigger an alarm. The instantaneous, unlatched bits available to trigger an alarm can be read from the 0x64 Alarm Raw Status() command, these bits are described in the table below.
Name | Description |
---|---|
SSA | This bit is set when a bit in 0x03 Safety Status A() is set |
SSB | This bit is set when a bit in 0x05 Safety Status B() is set |
SAA | This bit is set when a bit in 0x02 Safety Alert A() is set |
SAB | This bit is set when a bit in 0x04 Safety Alert B() is set |
XCHG | This bit is set when the CHG FET is off. |
XDSG | This bit is set when the DSG FET is off. |
SHUTV | Stack voltage is below Power:Shutdown:Shutdown Stack Voltage or a cell voltage is below Power:Shutdown:Shutdown Cell Voltage. |
CB | This bit is set when cell balancing is active. |
FULLSCAN | Fullscan Complete. The necessary multiple ADSCANs have been completed to collect the fullscan measurement loop data. This bit in 0x64 Alarm Raw Status() pulses momentarily each time a fullscan completes. |
ADSCAN | Voltage ADSCAN Complete. A single ADC ADSCAN is complete (cell voltages and current are measured on each ADSCAN). This bit in 0x64 Alarm Raw Status() pulses momentarily each time a cell voltage ADC scan completes. |
WAKE | This bit is set when the device is wakened from SLEEP mode. |
SLEEP | This bit in 0x64 Alarm Raw Status() pulses momentarily when the device enters SLEEP mode. |
TIMER_ALARM | This bit in 0x64 Alarm Raw Status() pulses momentarily when the programmable timer expires. |
INITCOMP | This bit in 0x64 Alarm Raw Status() pulses momentarily when the device completes the startup measurement sequence (which occurs as powerup, reset, exit of CONFIG_UPDATE mode, and exit of DEEPSLEEP). |
CDRAW / CDTOGGLE | This bit in 0x64 Alarm Raw Status() is CDRAW, the value of the CHG Detector output. The corresponding bit in 0x62 Alarm Status() is CDTOGGLE, which is set whenever the debounced version of CDRAW changes state from the previous latched state. |
POR | This bit reflects the POR bit in 0x12 Battery Status(). It is set when the device is first powered up, and is cleared when CONFIG_UPDATE mode is exited. If the host initializes settings at each device power up, monitoring this bit can alert the host that a reset has occurred and the device needs to be reinitialized. |
The 0x64 Alarm Raw Status() command provides the unlatched instantaneous value of each signal listed above. For each signal that is specified by the masking to be included in the alarm, when the bit in 0x64 Alarm Raw Status() is asserted, the bit is latched into the 0x62 Alarm Status() register, and the ALERT pin is asserted (pulled low) if any bit in 0x62 Alarm Status() is asserted. When the host receives the interrupt from the ALERT pin pulled low, the host can read the 0x62 Alarm Status() register to determine which flag has caused the alarm. The host can then write to the 0x62 Alarm Status() command with the corresponding bit(s) set, and the corresponding flags are unlatched.
The default alarm mask is set by the Settings:Configuration:Default Alarm Mask data memory value. This mask can be changed during operation using the 0x66 Alarm Enable() command, to mask or unmask individual bits from generating an alarm signal.
Several of the bits in Alarm Raw Status() only pulse momentarily when an event occurs, so are not intended to be monitored by reading 0x64 Alarm Raw Status(). This includes [WAKE], [SLEEP], [ADSCAN], [FULLSCAN], [INITCOMP], and [TIMER_ALARM]. If these bits are included by mask setting in the 0x62 Alarm Status(), then the corresponding bits in 0x62 Alarm Status() latch and remain asserted until cleared by the host.
The host can include the [ADSCAN] or [FULLSCAN] bits into 0x62 Alarm Status() to determine when data from a new measurement loop scan is available. Similarly, if the [WAKE] and [SLEEP] bits are included into 0x62 Alarm Status(), this allows the host to get a single interrupt on the ALERT pin whenever the device changes from NORMAL to SLEEP mode or from SLEEP to NORMAL mode.