The BQ76907 integrates an extensive protection subsystem which can monitor a variety of parameters, initiate protective actions, and autonomously recover based on conditions. The device also includes a wide range of flexibility, such that the device can be configured to monitor and initiate protective action, but with recovery controlled by the host processor, or such that the device only monitors and alerts the host processor whenever conditions warrant protective action, but with action and recovery fully controlled by the host processor. The protection subsystem includes a suite of individual protections that can be individually enabled and configured, as shown in Table 6-1. The current protections are based on comparator thresholds, while most voltage and temperature protections are based on ADC measurements. Some protection checks are primarily for diagnostic purposes, so the device can be autonomously disabled if a malfunction is detected. The device integrates NFET drivers for low-side CHG and DSG protection FETs, which can be configured in a series or parallel configuration. The FET drivers also support PWM modes of operation, which can be used to implement a precharge or predischarge functionality.

The individual protections are enabled by setting the related Settings:Protection:Enabled Protections A – B data memory configuration registers. Most protections include a programmable threshold, and when the monitored parameter first exceeds the programmed threshold, a protection alert is asserted. After the parameter remains beyond the threshold for a programmable delay period, a protection status fault is asserted (and the alert is deasserted). The protection alerts are provided by the 0x02 Safety Alert A() and 0x04 Safety Alert B() commands, while the protection status faults are provided by the 0x03 Safety Status A() and 0x05 Safety Status B() commands, as shown below. Most protections also include a programmable recovery criteria, such that if the parameter no longer exceeds the threshold by some margin, the protection status fault is deasserted. Protection alert and status faults can be mapped to provide an interrupt to the host processor on the ALERT pin, using the 0x62 Alarm Status(), 0x64 Alarm Raw Status(), and 0x66 Alarm Enable() commands.

The thresholds, delays, and recovery criteria are controlled by individual data memory settings in the Protections class. For example, the Cell Undervoltage Protection is configured using the Protections:Cell Voltage:Cell Undervoltage Protection Threshold, Protections:Cell Voltage:Cell Undervoltage Protection Delay, and Protections:Cell Voltage:Cell Undervoltage Protection Recovery Hysteresis data memory settings.

The control of the protection FETs in response to a detected protection event is also configurable, with the device able to operate in a fully autonomous mode, a completely manual mode (controlled through host commands over the serial communications bus), or a combination of the two. Autonomous mode is enabled by setting the Settings:Configuration:FET Options[FET_EN] data memory configuration bit or sending the 0x0022 FET Enable() subcommand, which toggles the [FET_EN] bit. The device can operate in a combined autonomous/manual mode, such that the device can operate autonomously when the host processor does not intervene, but still allows the host to override the autonomous decisions and force FETs on or off based on serial communications. This can be attractive in cases where the host can want autonomous reaction to selected faults, such as a short circuit in discharge event, to provide the fastest protection response, but prefer manual control for other faults, such as cell overtemperature or overvoltage faults. The 0x29 FET Control() command provides manual FET control capability by the host. If the user is concerned about unauthorized or inadvertent manual FET control by a host, these selected commands can be disabled using the Settings:Configuration:FET Options[HOST_FETOFF_EN] and [HOST_FETON_EN] data memory configuration settings. Each protection can be configured whether or not it autonomously disables the pertinent protection FET using the Settings:Protection:CHG FET Protections A, Settings:Protection:DSG FET Protections A, and Settings:Protection:Both FET Protections C settings.