SLUUCP8 June 2024 BQ41Z50
When a high-to-low transition on the SHUTDN pin is detected with a debounce delay of SYS_PRES Delay samples (each sample is taken at 250-ms interval) for the low-level threshold, the gauge turns off the CHG and DSG FETs immediately. This entry method only applies if [NR] = 1 and DA Configuration[EMSHUT] = 1. If [NR] = 0, the SHUTDN pin will restore to the regular system present detection.