SLUUCY8 December 2023 BQ77307
Class | Subclass | Name | Type | Min | Max | Default | Unit |
---|---|---|---|---|---|---|---|
Settings | Protection | DSG FET Protections A | H1 | 0x00 | 0xFF | 0xFF | Hex |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CUV | SCD | OCD1 | OCD2 | RSVD0 | OTD | UTD | OTINT |
Description: This bit field configures which protections disable the DSG FET.
Bit | Field | Default | Description |
---|---|---|---|
7 | CUV | 1 | Cell Undervoltage Protection 0 = DSG FET is not disabled when protection is triggered. 1 = DSG FET is disabled when protection is triggered. |
6 | SCD | 1 | Short circuit in discharge protection 0 = DSG FET is not disabled when protection is triggered. 1 = DSG FET is disabled when protection is triggered. |
5 | OCD1 | 1 | Overcurrent in discharge protection 1 0 = DSG FET is not disabled when protection is triggered. 1 = DSG FET is disabled when protection is triggered. |
4 | OCD2 | 1 | Overcurrent in discharge protection 2 0 = DSG FET is not disabled when protection is triggered. 1 = DSG FET is disabled when protection is triggered. |
2 | OTD | 1 | Overtemperature in Discharge Protection 0 = DSG FET is not disabled when protection is triggered. 1 = DSG FET is disabled when protection is triggered. |
1 | UTD | 1 | Undertemperature in Discharge Protection 0 = DSG FET is not disabled when protection is triggered. 1 = DSG FET is disabled when protection is triggered. |
0 | OTINT | 1 | Internal Overtemperature Protection 0 = DSG FET is not disabled when protection is triggered. 1 = DSG FET is disabled when protection is triggered. |