3 Test Device and Evaluation Board Information

The TPS7H4001-SP is packaged in a 34-pin thermally-enhanced dual ceramic flat pack package (HKH) as shown in Figure 3-1. The TPS7H4001EVM-CVAL evaluation board was used to evaluate the performance and characteristics of the TPS7H4001-SP under heavy-ions. Board schematics are shown in Figure 3-3. Top view of the evaluation board used for radiation testing campaign is shown in Section 3.

The package lid was removed to reveal the die face for all heavy-ion testing.

Figure 3-1 Photograph of Delidded TPS7H4001-SP [Left] and a Pin-Out Diagram [Right]

Figure 3-2 Photograph of the Delidded TPS7H4001-SP (SHP) [Left] and a Pin-Out Diagram [Right]

During some SET testing runs of the TPS7H4001-SP, the PWRGD filter was populated as indicated on the schematics. It is important to notice that the EVM ships with these components default as DNI. Transistor Q1 was removed for all the SEE test campaign.

Figure 3-3 Schematic of the TPS7H4001EVM-CVAL Used During SEE Testing

Figure 3-4 TPS7H4001EVM-CVAL Board (Top View)