3 Theoretical Analysis

Figure 3-1 shows the equivalent circuit of the typical implementation, where V_LNB is the output voltage of V_LNB pin and it is equivalent to a voltage source supplying to the LRC network and the load resistor R_o. V_o is the output voltage, i_o is the load current, i_sw is the current of the FET and V_sw is the voltage drop across the FET.

To reflect the attenuation of data transmission, the transfer function of V_o to V_LNB is defined as follows in Equation 1

When the FET is on, assuming all component are ideal, then i_sw = i_o and V_o = V_LNB. Therefore, G(s) = 1, which means there is no attenuation of the 22-kHz tone.

When the FET is off, i_sw = 0, the tone signal is attenuated due to LCR network. And G(s) can be expressed as Equation 2.

Where Z(s) can be expressed as Equation 3:

Hence the attenuation of 22-kHz tone can be expressed as Equation 4:

Figure 3-2 shows the simulation waveforms of the equivalent circuit, where GDR is the gate drive signal of the FET. It can be seen from the waveforms that there is no attenuation of the tone signal when FET is on, and when the FET is off, the attenuation of 22-kHz tone is –4.437 dB.

In practice, when the 22-kHz tone ends, V_LNB is a constant voltage, but the FET will not turn off at once. So there is a constant current flowing through the FET and i_sw = i_o. After a fixed delay time t_delay, the FET turns off and i_sw = 0. The switching action causes a current transient ΔI_sw to the FET path. At the moment the FET turns off, there will be a voltage drop across the FET due to the current transient. To better understand, the control circuit of the typical implementation can be represented by the blocks in Figure 3-3 based on Figure 3-1.

The transfer function of V_sw(s) to i_sw(s) can be generated as Equation 5:

The inverse Laplace transform of Equation 5 allows the voltage to be expressed as Equation 6.

where: x₁ and x₂ can be expressed as Equation 7 and Equation 8.

The maximum value of the voltage drop can be calculated at the extremum point t_EP when the derivative of v_sw(t) equals 0, and can be expressed as Equation 9:

According to Equation 9, t_EP becomes Equation 10:

Considering that R_o = 22.3 Ω, so ΔI_sw = 0.6 A, then V_{sw_dropmax} can be expressed as Equation 11:

Figure 3-4 shows the simulation results of the voltage drop across the FET, and it can be found that V_{sw_dropmax} = 4.59 V.

However, in practice, the voltage drop is clamped by the V_f of body diode of the FET. So the voltage drop V_{sw_drop} = min[V_f, V_{sw_dropmax}].

As previously described, adding a capacitor in series with the FET blocks the DC current path. The DC current flows continuously in the inductor and there is no transient dip when the FET is turned off. Figure 3-5 shows the equivalent circuit with the added capacitor.

The value of the capacitor will affect the attenuation of 22-kHz tone when FET is on, and G(s) will be changed as Equation 12:

where Z₁(s) can be expressed as Equation 13:

Hence the attenuation of the 22-kHz tone can expressed as Equation 14:

Based on Equation 14, C_add can be selected to meet the maximum attenuation. For example, if the amplitude of 22-kHz tone is 650 mV, and maximum attenuation is 100 mV, then C_add of at least 1 µF is required. Figure 3-6 shows the experimental results for 1-µF C_add. Results for a 22-µF C_add have already been seen in Figure 2-4.