SLVK125A november 2022 – may 2023 TPS7H4001-SP
PRODUCTION DATA
The TPS7H4001-SHP Specification Compliance Matrix is comprised of electrical, timing, and switching characteristics lists as shown in the following tables.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | TEST# | |
---|---|---|---|---|---|---|---|
SUPPLY VOLTAGE (VIN AND PVIN PINS) | |||||||
PVIN operating input voltage | 3.0 | 7.0 | V | ||||
PVIN internal UVLO threshold | PVIN rising | 2.425 | 2.50 | 2.575 | V | 23.0 | |
PVIN internal UVLO hysteresis | Load = 0 A | 425 | 450 | 475 | mV | 23.2 | |
VIN operating input voltage | 3.0 | 7.0 | V | ||||
VIN internal UVLO threshold | VIN rising | 2.71 | 2.75 | 2.80 | V | 24.0 | |
VIN internal UVLO hysteresis | 134 | 150 | 178 | mV | 24.2 | ||
VIN shutdown supply current | VEN = 0 V | 2.32 | 2.85 | mA | 4.1, 4.3 | ||
VIN operating – non switching supply current | VSENSE = VBG | 4 | 6 | mA | 4.0, 4.2 | ||
ENABLE AND UVLO (EN PIN) | |||||||
Enable threshold | Rising | 1.110 | 1.14 | 1.172 | V | 7.0, 7.6 | |
Falling | 1.080 | 1.11 | 1.148 | 7.1, 7.7 | |||
Input current | VEN = 1.1 V | 4.8 | 6.1 | 7.6 | µ | 7.3 | |
Hysteresis current | VEN = 1.3 V | 2.4 | 3.0 | 3.9 | µ | 7.5 | |
VOLTAGE REFERENCE | |||||||
Internal voltage reference initial tolerance | 0 A ≤ Iout ≤ 18 A, 25℃ | 0.598 | 0.605 | 0.613 | V | 3.8, 3.10 | |
Internal voltage reference | 0 A ≤ Iout ≤ 18 A | –55℃ | 0.594 | 0.602 | 0.609 | V | 3.8, 3.10 |
+125℃ | 0.599 | 0.607 | 0.614 | 3.8, 3.10 | |||
REFCAP voltage | REFCAP = 470 nF | 1.189 | 1.209 | 1.228 | V | 3.2, 3.3, 3.4 | |
MOSFET | |||||||
High-side switch resistance(1) | PVIN = VIN = 3 V, lead | –55℃ | 16 | 18 | mΩ | 8.0 | |
length = 3 mm | 25℃ | 19 | 21 | 8.0 | |||
125℃ | 23 | 27 | 8.0 | ||||
PVIN = VIN = 5 V, lead length = 3 mm | –55℃ | 14 | 16 | 8.1 | |||
25℃ | 17 | 19 | 8.1 | ||||
125℃ | 20 | 23 | 8.1 | ||||
Low-side switch resistance(1) | PVIN = VIN = 3 V, lead | –55℃ | 7 | 11 | mΩ | 15.0 | |
25℃ | 9 | 12 | 1.0, 15.0 | ||||
length = 3 mm | |||||||
125℃ | 13 | 17 | 15.0 | ||||
PVIN = VIN = 5 V, lead length = 3 mm | –55℃ | 6 | 10 | 15.1 | |||
25℃ | 9 | 11 | 15.1 | ||||
125℃ | 12 | 15 | 15.1 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | TEST# | |
---|---|---|---|---|---|---|---|
ERROR AMPLIFIER | |||||||
Error amplifier input offset voltage | VSENSE = 0.6 V | –2 | 2.55 | mV | 3.9,3.11 | ||
VSENSE pin input current | VSENSE = 0.6 V | –15 | 15 | nA | 3.5 | ||
Error amplifier transconductance (gm) | –2 μA < ICOMP < 2 μA, V(COMP) = 1 V | 1150 | 1800 | 2400 | µS | 9.0,9.3 | |
Error amplifier DC gain(1) | VSENSE = 0.6 V | 10000 | V/V | ||||
Error amplifier source | V(COMP) = 1 V, 100-mV input overdrive | 100 | 140 | 190 | µA | 9.2, 9.5 | |
Error amplifier sink | 100 | 140 | 190 | µA | 9.1, 9.4 | ||
INTERNAL SWITCHING FREQUENCY | |||||||
Internally set frequency | RT = Open | VIN = 3 V | 444 | 473 | 515 | kHz | 21.1, 21.2 |
VIN = 5 V | 449 | 502 | 560 | 21.4, 21.5 | |||
Externally set frequency | RT = 1.07 MΩ (1%) | VIN = 3 V | 80 | 98 | 125 | kHz | 5.0 |
VIN = 5 V | 80 | 100 | 125 | 11.0 | |||
RT = 165 kΩ (1%) | VIN = 3 V | 455 | 495 | 535 | 5.5 | ||
VIN = 5 V | 475 | 523 | 615 | 11.4 | |||
RT = 73.2 kΩ (1%) | VIN = 3 V | 689 | 850 | 1011 | 5.4 | ||
VIN = 5 V | 760 | 986 | 1212 | 11.2 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | TEST# |
---|---|---|---|---|---|---|
EXTERNAL SYNCHRONIZATION | ||||||
SYNC1/SYNC2 out
low-to-high rise time (10%/90%) | Cload = 25 pF | 70 | 180 | ns | 13.8, 13.12 | |
SYNC1/SYNC2 out
high-to-low fall time (90%/10%) | Cload = 25 pF | 10 | 21 | ns | 13.9, 13.13 | |
SYNC2 to SYNC1 rising edge phase shift | 77 | 85 | 94 | ° | 21.0, 21.3 | |
SYNC1 falling edge delay(1) | 165 | 180 | 185 | ° | 13.24, 13.25 | |
SYNC1/SYNC2 out high level threshold | IOH = 50 µA | VIN – 0.3 | V | 13.18, 13.22 | ||
SYNC1/SYNC2 out low level threshold | IOL = 50 µA | 600 | mV | 13.16, 13.20 | ||
SYNC1 in frequency range | PVIN = VIN = 5 V | 100 | 1000 | kHz | 22.2 | |
SYNC1 in duty cycle range | Duty cycle of external clock | 40 | 60 | % | 22.4 | |
PH (PH PIN) | ||||||
Minimum on time | Measured at 10% to 90% of VINIPH = 2 A, VIN = 5 V | 190 | 235 | ns | 5.6 | |
Measured at 10% to 90% of VIN, IPH= 2 A, VIN = 5 V | 190 | 225 | 11.6 | |||
SOFT START AND TRACKING (SS/TR PIN) | ||||||
SS charge current | 1.5 | 2.5 | 3 | µA | 9.6, 9.7 | |
POWER GOOD (PWRGD PIN) | ||||||
VSENSE threshold | VSENSE falling (fault) | 90 | 91 | %VREF | 12.0, 12.6 | |
VSENSE rising (good) | 94 | 97 | 12.1, 12.7 | |||
VSENSE rising (fault) | 109 | 111 | 12.2, 12.8 | |||
VSENSE falling (good) | 103 | 106 | 12.3, 12.9 | |||
Output high leakage | VSENSE = VREF, V(PWRGD) = 5 V | 30 | 181 | nA | 12.4, 12.10 | |
Output low | I(PWRGD) = 2 mA | 0.3 | V | 12.5, 12.11 |