| POWER LIMITING AND CURRENT LIMITING (SENSE) |
| tF_TRIP |
Large overload response time to GATE low |
VPROG = 4 V, VOUT = VSENSE,
V(VCC-SENSE): 0 → 200 mV,
C(GATE-OUT) = 2 nF, V(GATE-OUT) = 1 V |
|
|
1.2 |
µs |
| GATE DRIVE OUTPUT (GATE) |
| tD_ON |
Propagation delay: EN going true to GATE output high |
VEN = 0 → 2.5 V, 50% of VEN to 50% of VGATE, VOUT = VVCC, R(GATE-OUT)= 1 MΩ |
|
25 |
40 |
µs |
| tD_OFF |
Propagation delay: EN going false (0 V) to GATE output low |
VEN = 2.5 V → 0, 50% of VEN to 50% of VGATE, VOUT = VVCC,
R(GATE-OUT)= 1 MΩ, tFALL < 0.1 µs |
|
0.5 |
1 |
µs |
|
Propagation delay: TIMER expires to GATE output low |
VTIMER: 0 → 5 V, tRISE < 0.1 µs, 50% of VTIMER to 50% of VGATE, VOUT = VVCC, R(GATE-OUT) = 1 MΩ, |
|
0.8 |
1 |
µs |
| POWER GOOD OUTPUT (PG) |
| tDPG |
PG deglitch delay, detection to output, rising and falling edges |
VSENSE = VVCC |
5 |
9 |
15 |
ms |