SLVS840D November 2015 – August 2016
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
11 Layout
11.1 Layout Guidelines
For best performance, all traces must be as short as possible. To be most effective, the input and load capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have on operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects.
11.2 Layout Example
Figure 35. TPS22925xx Layout Example