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SLVSA95B March 2010 – July 2015 TPS62060 , TPS62061 , TPS62063

PRODUCTION DATA.

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TPS62060, TPS62061 and TPS62063 are highly efficient synchronous step down DC-DC converters providing up to 1.6-A output current.

9.2 Typical Application

TPS62060 TPS62061 TPS62063 typ_app1_18adj_lvsa95.gif

Figure 8. TPS62060 1.8-V Adjustable Output Voltage Configuration

9.2.1 Design Requirements

The device operates over an input voltage range from 2.7 V to 6 V. The output voltage is adjustable using an external feedback divider.

9.2.2 Detailed Design Procedure

9.2.2.1 Output Voltage Setting

The output voltage can be calculated to:

Equation 2. TPS62060 TPS62061 TPS62063 inl1_vout_lvs833.gif

with an internal reference voltage V_REF typically 0.6 V.

To minimize the current through the feedback divider network, R₂ should be within the range of 120 kΩ to 360 kΩ. The sum of R₁ and R₂ should not exceed ~1 MΩ, to keep the network robust against noise. An external feed-forward capacitor C_ff is required for optimum regulation performance. Lower resistor values can be used. R1 and C_ff places a zero in the loop. The right value for C_ff can be calculated as:

Equation 3. TPS62060 TPS62061 TPS62063 EQ2_fz1_lvs833.gif

Therefore, the feed forward capacitor can be calculated to:

Equation 4. TPS62060 TPS62061 TPS62063 EQ3_cff1_lvs833.gif

9.2.2.2 Output Filter Design (Inductor and Output Capacitor)

The internal compensation network of TPS6206x is optimized for a LC output filter with a corner frequency of:

Equation 5. TPS62060 TPS62061 TPS62063 eq_fc50_lvsa95.gif

The device operates with nominal inductors of 1 µH to 1.2 µH and with 10 µF to 22 µF small X5R and X7R ceramic capacitors. Refer to the lists of inductors and capacitors. The device is optimized for a 1 µH inductor and 10 µF output capacitor.

9.2.2.2.1 Inductor Selection

The inductor value has a direct effect on the ripple current. The selected inductor must be rated for its DC resistance and saturation current. The inductor ripple current (ΔI_L) decreases with higher inductance and increases with higher V_IN or V_OUT.

Equation 6 calculates the maximum inductor current in PWM mode under static load conditions. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 7. This is recommended because during heavy load transient the inductor current rises above the calculated value.

Equation 6. TPS62060 TPS62061 TPS62063 q3_delta_lvs833_.gif

Equation 7. TPS62060 TPS62061 TPS62063 q4_ilmax_lvs833.gif

where

f = Switching frequency (3 MHz typical)
L = Inductor value
ΔI_L = Peak-to-peak inductor ripple current
I_Lmax = Maximum inductor current
I_outmax = Maximum output current

A more conservative approach is to select the inductor current rating just for the switch current of the converter.

Accepting larger values of ripple current allows the use of lower inductance values, but results in higher output voltage ripple, greater core losses, and lower output current capability.

The total losses of the coil have a strong impact on the efficiency of the DC-DC conversion and consist of both the losses in the DC resistance R_(DC) and the following frequency-dependent components:

The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
Additional losses in the conductor from the skin effect (current displacement at high frequencies)
Magnetic field losses of the neighboring windings (proximity effect)
Radiation losses

Table 1. List of Inductors

DIMENSIONS [mm³]	INDUCTANCE μH	INDUCTOR TYPE	SUPPLIER
3.2 × 2.5 × 1.2 max	1	MIPSAZ3225D	FDK
3.2 × 2.5 × 1 max	1	LQM32PN (MLCC)	Murata
3.7 × 4 × 1.8 max	1	LQH44 (wire wound)	Murata
4 × 4 × 2.6 max	1.2	NRG4026T (wire wound)	Taiyo Yuden
3.5 × 3.7 × 1.8 max	1.2	DE3518 (wire wound)	TOKO

9.2.2.2.2 Output Capacitor Selection

The advanced fast-response voltage mode control scheme of the TPS6206x allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies and may not be used. For most applications a nominal 10 µF or 22 µF capacitor is suitable. At small ceramic capacitors, the DC-bias effect decreases the effective capacitance. Therefore a 22 µF capacitor can be used for output voltages higher than 2 V, see list of capacitors.

In case additional ceramic capacitors in the supplied system are connected to the output of the DC-DC converter, the output capacitor C_OUT must be decreased in order not to exceed the recommended effective capacitance range. In this case a loop stability analysis must be performed as described later.

At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:

Equation 8. TPS62060 TPS62061 TPS62063 q5_irmsc_lvs833.gif

9.2.2.2.3 Input Capacitor Selection

Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is required for best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. For most applications a 10 µF ceramic capacitor is recommended. The input capacitor can be increased without any limit for better input voltage filtering.

Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on the input can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even damage the part by exceeding the maximum ratings.

Table 2. List of Capacitors

CAPACITANCE	TYPE	SIZE [mm³]	SUPPLIER
10 μF	GRM188R60J106M	0603: 1.6 x 0.8 x 0.8	Murata
22 μF	GRM188R60G226M	0603: 1.6 x 0.8 x 0.8	Murata
22 µF	CL10A226MQ8NRNC	0603: 1.6 x 0.8 x 0.8	Samsung
10 µF	CL10A106MQ8NRNC	0603: 1.6 x 0.8 x 0.8	Samsung

9.2.2.3 Checking Loop Stability

The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals

Switching node, SW
Inductor current, I_L
Output ripple voltage, V_OUT(AC)

These are the basic signals that must be measured when evaluating a switching converter. When the switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the regulation loop may be unstable. This is often a result of board layout and/or wrong L-C output filter combinations. As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between the application of the load transient and the turnon of the P-channel MOSFET, the output capacitor must supply all of the current required by the load. V_OUT immediately shifts by an amount equal to Δ_I(LOAD) x ESR, where ESR is the effective series resistance of C_OUT. Δ_I(LOAD) begins to charge or discharge C_OUT generating a feedback error signal used by the regulator to return V_OUT to its steady-state value. The results are most easily interpreted when the device operates in PWM mode at medium to high load currents.

During this recovery time, V_OUT can be monitored for settling time, overshoot, or ringing; that helps evaluate stability of the converter. Without any ringing, the loop has usually more than 45° of phase margin.