SLVSAR7E June   2011  – October 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 Power Dissipation Derating Profile, 38-Pin HTTSOP PowerPAD Package
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Buck Controllers: Normal Mode PWM Operation
        1. 7.3.1.1 Frequency Selection and External Synchronization
        2. 7.3.1.2 Enable Inputs
        3. 7.3.1.3 Feedback Inputs
        4. 7.3.1.4 Soft-Start Inputs
        5. 7.3.1.5 Current-Mode Operation
        6. 7.3.1.6 Current Sensing and Current Limit With Foldback
        7. 7.3.1.7 Slope Compensation
        8. 7.3.1.8 Power-Good Outputs and Filter Delays
        9. 7.3.1.9 Light-Load PFM Mode
      2. 7.3.2 Frequency-Hopping Spread Spectrum (TPS43351-Q1 Only)
      3. 7.3.3 Gate-Driver Supply (VREG, EXTSUP)
      4. 7.3.4 External P-Channel Drive (GC2) and Reverse-Battery Protection
      5. 7.3.5 Undervoltage Lockout and Overvoltage Protection
      6. 7.3.6 Thermal Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  BuckA Component Selection
          1. 8.2.2.1.1 Minimum ON Time, tON min
          2. 8.2.2.1.2 Current-Sense Resistor RSENSE
        2. 8.2.2.2  Inductor Selection L
        3. 8.2.2.3  Inductor Ripple Current IRIPPLE
        4. 8.2.2.4  Output Capacitor COUTA
        5. 8.2.2.5  Bandwidth of Buck Converter fC
        6. 8.2.2.6  Selection of Components for Type II Compensation
        7. 8.2.2.7  Resistor Divider Selection for Setting VOUTA Voltage
        8. 8.2.2.8  BuckB Component Selection
        9. 8.2.2.9  Resistor Divider Selection for Setting VOUT Voltage
        10. 8.2.2.10 BUCKx High-Side and Low-Side N-Channel MOSFETs
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Buck Converter
      2. 10.1.2 Other Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

4 Revision History

Changes from D Revision (April 2013) to E Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section and Go
  • Changed typically 30 µA in Description section Go
  • Deleted the PACKAGE AND ORDERING INFORMATION section; see the POA at the end of the datasheetGo
  • Changed I/O to TYPE in Pin Functions and clarified GND for pins AGND, PGNDA, and PGNDB and to PWR for pins VBAT and VINGo
  • Changed description for PGA and PGB pinsGo
  • Added description for Gate-driver supply in Absolute Maximum Ratings tableGo
  • Changed 1.7 and 1.8 TYP and MAX columns to span rows Go
  • Changed 1.9 Shutdown current TYP to 3 and MAX to 5Go
  • Added inductor ripple current equationGo
  • Changed Layout Guidelines text Go

Changes from C Revision (September 2012) to D Revision

  • Changed pinout diagramGo
  • Revised Absolute Maximum Ratings tableGo

Changes from B Revision (June 2011) to C Revision

  • Changed input-voltage value for pins ENA and ENBGo
  • Added a sentence to EXTSUP pin descriptionGo
  • Corrected AEC specification in ESD ratingsGo
  • Multiple changes throughout Electrical Characteristics tableGo
  • Changed upper threshold voltage for ENx pins to 1.7 VGo
  • Text deletion from second paragraph of Light-Load PFM Mode sectionGo
  • Changed value of gate-driver decoupling capacitorGo
  • Added upper voltage limit for EXTSUP pinGo
  • Replaced paragraphs following the figure at end of Gate-Driver Supply sectionGo
  • Revised diagram of Simplified Application Schematic ExampleGo
  • Clarified parameter definition in Application Example tableGo
  • Added equations for Output Capacitor COUTA sectionGo
  • Added equations for BuckB Component Selection sectiionGo
  • Changed peak output current in BuckX High-Side and Low-Side N-Channel MOSFETs sectionGo
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