SLVSDU6D July   2017  – November 2019

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
  8. 8 Typical Characteristics
  9. 9 Parameter Measurement Information
    1. 9.1 Temperature Coefficient
    2. 9.2 Dynamic Impedance
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
    4. 10.4 Device Functional Modes
      1. 10.4.1 Open Loop (Comparator)
      2. 10.4.2 Closed Loop
  11. 11Applications and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Applications
      1. 11.2.1 Comparator With Integrated Reference
        1. 11.2.1.1 Design Requirements
        2. 11.2.1.2 Detailed Design Procedure
          1. 11.2.1.2.1 Basic Operation
            1. 11.2.1.2.1.1 Overdrive
          2. 11.2.1.2.2 Output Voltage and Logic Input Level
            1. 11.2.1.2.2.1 Input Resistance
        3. 11.2.1.3 Application Curve
      2. 11.2.2 Precision Constant Current Sink
        1. 11.2.2.1 Design Requirements
        2. 11.2.2.2 Detailed Design Procedure
          1. 11.2.2.2.1 Basic Operation
            1. 11.2.2.2.1.1 Output Current Range and Accuracy
          2. 11.2.2.2.2 Power Consumption
      3. 11.2.3 Shunt Regulator/Reference
        1. 11.2.3.1 Design Requirements
        2. 11.2.3.2 Detailed Design Procedure
          1. 11.2.3.2.1 Programming Output/Cathode Voltage
          2. 11.2.3.2.2 Total Accuracy
          3. 11.2.3.2.3 Stability
          4. 11.2.3.2.4 Start-Up Time
        3. 11.2.3.3 Application Curve
      4. 11.2.4 Isolated Flyback with Optocoupler
        1. 11.2.4.1 Design Requirements
          1. 11.2.4.1.1 Detailed Design Procedure
            1. 11.2.4.1.1.1 ATL431LI Biasing
            2. 11.2.4.1.1.2 Resistor Feedback Network
    3. 11.3 System Examples
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 SOT23-3 Layout Example
    3. 13.3 X2SON (DQN) Layout Example
    4. 13.4 Thermal Considerations
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Device Nomenclature
      2. 14.1.2 Related Documentation
    2. 14.2 Related Links
    3. 14.3 Receiving Notification of Documentation Updates
    4. 14.4 Community Resources
    5. 14.5 Trademarks
    6. 14.6 Electrostatic Discharge Caution
    7. 14.7 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

8 Typical Characteristics

Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

ATL431LI ATL432LI ATL431LI-S_vref_temp.gifFigure 1. Reference Voltage vs Free-Air Temperature
ATL431LI ATL432LI D003VkavsIkaATL431.gifFigure 3. Cathode Current vs Cathode Voltage
ATL431LI ATL432LI D0005Ioff.gifFigure 5. Off-State Cathode Current
vs Free-Air Temperature
ATL431LI ATL432LI D002IrefvsTemp.gifFigure 2. Reference Current vs Free-Air Temperature
ATL431LI ATL432LI D004IKAminATL431.gifFigure 4. Cathode Current vs Cathode Voltage
ATL431LI ATL432LI D0006deltav1.gifFigure 6. Ratio of Delta Reference Voltage to Delta Cathode Voltage vs Free-Air Temperature
ATL431LI ATL432LI D000gainphase.gif
Figure 7. Small-Signal Voltage Amplification
vs Frequency
ATL431LI ATL432LI D005Zkavsf.gifFigure 9. Reference Impedance vs Frequency
ATL431LI ATL432LI pulseresponse.gifFigure 11. Pulse Response
ATL431LI ATL432LI ATL431D010Stability1mA_v3.gif
The areas under the curves represent conditions that may cause the device to oscillate. For curves B and C, R2 and V+ are adjusted to establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL then are adjusted to determine the ranges of stability.
Figure 13. Stability Boundary Conditions for All ATL431LI, ATL432LI Devices Above 1 mA
ATL431LI ATL432LI ATL431D010Stability100uA_v2.gif
A. The areas in-between the curves represent conditions that may cause the device to oscillate. For curves B, and C, R2 and V+ are adjusted to establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL then are adjusted to determine the ranges of stability.
Figure 15. Stability Boundary Conditions for All ATL431LI, ATL432LI Devices Below 1 mA
ATL431LI ATL432LI tc_4_2_lvs543.gifFigure 8. Test Circuit for Voltage Amplification
ATL431LI ATL432LI tc_4_4_lvs543.gif
Figure 10. Test Circuit for Reference Impedance
ATL431LI ATL432LI tc_5_2_lvs543.gif
Figure 12. Test Circuit for Pulse Response
ATL431LI ATL432LI tc_6_4_lvs543.gifFigure 14. Test Circuit for Stability Boundary Conditions
ATL431LI ATL432LI tc_6_4_lvs543.gifFigure 16. Test Circuit for Stability Boundary Conditions
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