SLVSDV6C November   2017  – November 2019

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Schematic space space space space
      2.      Efficiency vs Output Current space
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable / Shutdown and Output Discharge
      2. 8.3.2 Soft-Start
      3. 8.3.3 Power Good (PG)
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode (PSM) Operation
      3. 8.4.3 Minimum Duty Cycle and 100% Mode Operation
      4. 8.4.4 Current Limit and Short Circuit Protection
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Setting the Adjustable Output Voltage
        3. 9.2.2.3 Feed-forward Capacitor Selection
        4. 9.2.2.4 Output Filter Selection
        5. 9.2.2.5 Inductor Selection
        6. 9.2.2.6 Output Capacitor Selection
        7. 9.2.2.7 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7.5 Electrical Characteristics

over operating junction temperature range (TJ=-40°C to 125°C) and VIN=2.4V to 5.5V. Typical values at VIN=5V and TJ=25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input Voltage range 2.4 5.5 V
IQ Operating Quiescent Current EN=High, IOUT=0A, device not switching 4 10 µA
ISD Shutdown Current EN=Low, TJ = -40°C to 85°C 0.05 0.5 µA
VUVLO Undervoltage Threshold Falling Input Voltage 2.1 2.2 2.3 V
Undervoltage Hysteresis 160 mV
TSD Thermal Shutdown Threshold Rising Junction Temperature 150 °C
Thermal Shutdown Hysteresis 20
CONTROL (EN, PG)
VH High-Level Threshold Voltage (EN) 1.0 V
VL Low-Level Threshold Voltage (EN) 0.4 V
ILKG Input Leakage Current (EN, PG) EN = High, VPG = 5V 10 100 nA
tSS Soft-Start Time Time from EN=High to 95% of VOUT nominal 1.25 ms
VPGTL Power Good Lower Threshold Voltage Rising (VFB vs regulation target) 94% 96% 98%
Falling (VFB vs regulation target) 90% 92% 94%
VPGTH Power Good Upper Threshold Voltage Rising (VFB vs regulation target) 108% 110% 112%
Falling (VFB vs regulation target) 103% 105% 107%
VPGL Power Good Logic Low Level Output Voltage IPG = -1mA 0.4 V
tPGD Power Good delay rising 100 µs
falling 20
POWER SWITCH
FSW Switching Frequency PWM Mode Operation 2.2 MHz
RDS(on) High-Side FET ON-Resistance TPS62821 35 mΩ
TPS62822 35
TPS62823 26
Low-Side FET ON-Resistance TPS62821,2,3 25
ILIM High-Side FET Current Limit TPS62821 1.7 2.1 2.4 A
TPS62822 2.7 3.3 3.7
TPS62823 3.7 4.3 5.0
OUTPUT
ILKG_FB Input Leakage Current (FB) EN=High, VFB=0.6V 10 50 nA
VFB Feedback Voltage Accuracy PWM Mode 594 600 606 mV
IDIS Output Discharge Current EN=Low, VSW = 0.4V 75 400 mA
DC Load Regulation PWM Mode Operation 0.2 %/A
DC Line Regulation PWM Mode Operation 0.05 %/V
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