SLVSE94G September 2018 – June 2024
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY VOLTAGE | ||||||
| V(IN_SYS) | Operating input voltage | 4.5 | 60 | V | ||
| IQ(ON) | Supply current | Enabled: V(SHDN) = 2 V | 1.38 | 1.7 | mA | |
| IQ(OFF) | V(SHDN) = 0 V | 21 | 60 | µA | ||
| I(GND) | Ground current during reverse polarity | V(IN_SYS) = –24V, V(IN) = Floating, V(OUT) = 0 V | 144 | 200 | µA | |
| V(OVC) | Over voltage clamp | TPS26632 and TPS26633, V(IN_SYS) > 35 V, I(OUT) = 1 mA | 32 | 32.8 | 35 | V |
| TPS26635 and TPS26636, V(IN_SYS) > 40 V, I(OUT) = 1 mA | 35.7 | 36.6 | 39 | V | ||
| UNDERVOLTAGE LOCKOUT (UVLO) INPUT | ||||||
| V(INSYS_UVLO) | Factory set V(IN_SYS) undervoltage trip level trip level | V(IN_SYS) rising, V(UVLO) = 0 V | 15.1 | 15.46 | 15.9 | V |
| V(IN_SYS) falling, V(UVLO) = 0 V | 14 | 14.47 | 15.1 | V | ||
| V(SEL_UVLO) | Internal UVLO select threshold | 180 | 210 | 240 | mV | |
| V(UVLOR) | UVLO threshold voltage, rising | 1.176 | 1.2 | 1.224 | V | |
| V(UVLOF) | UVLO threshold voltage, falling | 1.09 | 1.122 | 1.15 | V | |
| I(UVLO) | UVLO Input leakage current | 0 V ≤ V(UVLO) ≤ 60 V | –150 | 8 | 150 | nA |
| OVERVOLTAGE PROTECTION (OVP) INPUT | ||||||
| V(IN_SYS_OVP) | Factory set V(IN_SYS) overvoltage trip level trip level | V(IN_SYS) rising, V(OVP) = 0 V | 33.2 | 34.33 | 35.4 | V |
| V(IN_SYS) falling, V(OVP) = 0 V | 32.7 | 33.89 | 35 | V | ||
| V(SEL_OVP) | Internal OVP select threshold | 180 | 210 | 240 | mV | |
| V(OVPR) | over-voltage threshold voltage, rising | 1.176 | 1.2 | 1.224 | V | |
| V(OVPF) | over-voltage threshold voltage, falling | 1.09 | 1.122 | 1.15 | V | |
| I(OVP) | OVP Input leakage current | 0 V ≤ V(OVP) ≤ 4 V | –150 | 0 | 150 | nA |
| CURRENT LIMIT PROGRAMMING (ILIM) | ||||||
| I(OL) | Over Load current limit | R(ILIM) = 30 kΩ, V(IN) – V(OUT) = 1 V | 0.54 | 0.6 | 0.66 | A |
| R(ILIM) = 9 kΩ, V(IN) – V(OUT) = 1 V | 1.84 | 2 | 2.16 | A | ||
| R(ILIM) = 4.02 kΩ, V(IN) – V(OUT) = 1 V | 4.185 | 4.5 | 4.815 | A | ||
| R(ILIM) = 3 kΩ, V(IN) – V(OUT) = 1 V | 5.58 | 6 | 6.42 | A | ||
| I(OL_Pulse) | Transient Pulse Over current limit | 3 kΩ < R(ILIM) < 30 kΩ, TPS26631, TPS26633, TPS26635 and TPS26637 Only | 2xI(OL) | A | ||
| I(FASTRIP) | Fast-trip comparator threshold | TPS26630 and TPS26632 Only | 2xI(OL) | A | ||
| I(FASTRIP) | Fast-trip comparator threshold | TPS26631, TPS26633,TPS26635 and TPS26637 Only | 3xI(OL) | A | ||
| I(SCP) | Short Circuit Protect current | 45 | A | |||
| OUTPUT POWER LIMITING CONTROL (PLIM) INPUT – TPS26632, TPS26633, TPS26635, TPS26636 and TPS26637 ONLY | ||||||
| V(SEL_PLIM) | Power Limit Feature select threshold | 160 | 217 | 240 | mV | |
| I(PLIM) | PLIM sourcing current | V(PLIM) = 0 V | 4.4 | 5.02 | 5.6 | µA |
| P(PLIM) | Max Output power | R(PLIM) = 100 kΩ | 94 | 100 | 106 | W |
| R(PLIM) = 150 kΩ (1) | 141.9 | 151 | 160.1 | W | ||
| P(PLIM) | Max Output power | R(PLIM) = 100 kΩ, VIN = 54 V, TPS26637 only | 100 | W | ||
| B_GATE (BLOCKING FET GATE DRIVER) | ||||||
| V(B_GATE) | B_GATE clamp voltage | V(B_GATE) – V(IN_SYS) | 8.3 | 10.23 | 14 | V |
| I(B_GATE) | Blocking FET Gate drive current | V(B_GATE) – V(IN_SYS) = 1 V | 16 | 19.4 | 23 | µA |
| Rpd_BGATE | B_GATE Pull down resistance | 800 | 1010 | 1200 | kΩ | |
| V(DRV_OH) | DRV logic high level | V(DRV) – V(IN_SYS), C(DRV) ≤ 50 pF | 3 | 4.25 | 5.2 | V |
| PASS FET OUTPUT (OUT) | ||||||
| RON | IN to OUT total ON resistance | 0.6 A ≤ I(OUT) ≤ 6 A,TJ = 25°C | 26 | 30.44 | 34.5 | mΩ |
| RON | IN to OUT total ON resistance | 0.6 A ≤ I(OUT) ≤ 6 A,TJ = 85°C | 33 | 45 | mΩ | |
| RON | IN to OUT total ON resistance | 0.6 A ≤ I(OUT) ≤ 6 A, –40°C ≤ TJ ≤ +125°C | 19 | 30.44 | 53 | mΩ |
| Ilkg(OUT) | OUT leakage during input supply brownout | V(IN_SYS) = 0 V, V(OUT) = 24 V, V(IN) = Floating, V(SHDN) = 2V, Sinking | –100 | µA | ||
| V(REVTH) | V(IN_SYS) – V(OUT) threshold for reverse protection comparator, rising | –20 | –15 | –9 | mV | |
| V(FWDTH) | V(IN_SYS) – V(OUT) threshold for reverse protection comparator, falling | 45 | 57 | 67 | mV | |
| OUTPUT RAMP CONTROL (dVdT) | ||||||
| I(dVdT) | dVdT charging current | V(dVdT) = 0 V | 1.775 | 2 | 2.225 | µA |
| GAIN(dVdT) | dVdT to OUT gain | V(OUT) /V(dVdT) | 23.5 | 25 | 26 | V/V |
| V(dVdTmax) | dVdT maximum capacitor voltage | 3.8 | 4.17 | 4.75 | V | |
| R(dVdT) | dVdT discharging resistance | 10 | 16.6 | 26.6 | Ω | |
| LOW IQ SHUTDOWN (SHDN) INPUT | ||||||
| V(SHDN) | Open circuit voltage | I(SHDN) = 0.1 µA | 2.48 | 2.7 | 3.3 | V |
| V(SHUTF) | SHDN threshold voltage for low IQ shutdown, falling | 0.8 | V | |||
| V(SHUTR) | SHDN threshold rising | 2 | V | |||
| I(SHDN) | Leakage current | V(SHDN) = 0 V | –10 | µA | ||
| CURRENT MONITOR OUTPUT (IMON) | ||||||
| GAIN(IMON) | Gain factor I(IMON):I(OUT) | 0.6 A ≤ I(OUT) ≤ 2 A | 25.66 | 27.9 | 30.14 | µA/A |
| 2 A ≤ I(OUT) ≤ 6 A | 26.22 | 27.9 | 29.58 | µA/A | ||
| FAULT FLAG (FLT): ACTIVE LOW | ||||||
| R(FLT) | FLT Pull-down resistance | 36 | 70 | 130 | Ω | |
| I(FLT) | FLT Input leakage current | 0 V ≤ V(FLT) ≤ 60 V | –150 | 6 | 150 | nA |
| POWER GOOD (PGOOD) | ||||||
| R(PGOOD) | PGOOD Pull-down resistance | 36 | 70 | 130 | Ω | |
| I(PGOOD) | PGOOD Input leakage current | 0 V ≤ V(PGOOD) ≤ 60 V | –150 | 150 | nA | |
| POSITIVE INPUT FOR POWER GOOD COMPARATOR (PGTH) | ||||||
| V(PGTHR) | PGTH threshold voltage, rising | 1.176 | 1.2 | 1.224 | V | |
| V(PGTHF) | PGTH threshold voltage, falling | 1.09 | 1.123 | 1.15 | V | |
| I(PGOOD) | PGTH input leakage current | 0 V ≤ V(PGTH) ≤ 60 V | –150 | 150 | nA | |
| THERMAL PROTECTION | ||||||
| T(J_REG) | Thermal regulation set point | 136 | 145 | 154 | ºC | |
| T(TSD) | Thermal shutdown (TSD) threshold, rising | 165 | ºC | |||
| T(TSDhyst) | TSD hysteresis | 11 | ºC | |||
| MODE | ||||||
| MODE_SEL | Mode selection | MODE = Open | Latch | |||
| MODE = Short to GND | Auto – Retry | |||||