The Sequencing Overview tab includes
instruments to customize the power sequence of the PMIC. Note that the check boxes are
power sequence masks. If a particular logic signal needs to be included as part
of the regulator or logic power up sequence, leave the box next to the logic signal
unchecked. TI recommends to set Power On Bit unmasked for each rail that is
required in the application.
When using a TPS65033x-Q1 device, the GPIO pin can also be used for power
sequencing of an external regulator or other device. In the
Special Features tab,
configure GPIO as an output to include its sequencing in the
Sequencing Overview
tab. Note that when using GPIO for sequencing, the GPIO Function must be
Enabled.
For reference, the GUI can generate example power-up and power-down timing
diagrams based on the sequence settings present when the
UPDATE TIMING DIAGRAM
button is clicked. As noted, rise and fall times are approximate, and the maximum
sequence length is 200 ms. Changes to regulator enable and output discharge settings are
reflected in the timing diagram. If the sequence settings are not valid, the GUI will
provide a notifying message and the timing diagram will not be updated. For example, if
a regulator is enabled but fails to power-up within 200 ms, the sequence settings are
not valid.