The TO_MCU sequence first turns off rails and GPIOs which are assigned to the SOC power group. The sequence enables the MCU rails, in the event that they are not already active (when transitioning from STANDBY to MCU_ONLY for example). If the I2C_6 bit (FSM_I2C_TRIGGERS register) is set high in both PMICs, the PMICs retain the processor GPIOs while keeping the MCU active as shown in Figure 6-9. If the I2C_7 bit (FSM_I2C_TRIGGERS register) is set high in both PMICs, they retain the SRAM while keeping the MCU active as shown in Figure 6-10. If both bits are set high in both devices, both GPIO and DDR rails are retained while the MCU is active, as shown in Figure 6-11. Lastly, if both I2C_6 and I2C_7 are set low in both devices, only the MCU rails remain active in this state as shown in Figure 6-12. These bits need to be set by I2C in both PMICs before a trigger for the retention state occurs.

Similar to the TO_ACTIVE sequence, the nRSTOUT signal is delayed 9ms after TPS65941B BUCK3 regulator is enabled by default. This delay is always 500us plus the time set by the PFSM_DELAY1 register. This value can be changed before entering the retention state to control when the nRSTOUT pin is released.