SLVUBY7A October 2020 – October 2022 DRA821U , DRA821U-Q1 , LP8764-Q1 , TPS6594-Q1
The TPS6594-Q1 and LP8764-Q1 devices consist of fixed registers and configurable registers that are loaded from the NVM. For all NVM registers, the initial NVM settings that load into the registers are provided in this section. Note that these initial NVM settings can be changed during state transitions, such as moving from STANDBY to ACTIVE mode. The full register map, including default values of fixed registers, is located in the corresponding PMIC data sheet. Empty values indicate that the device does not have the register included. For example, LP8764-Q1 does not have BUCK5 registers at all and therefore the values for it are empty.