SLVUBY7A October   2020  – October 2022 DRA821U , DRA821U-Q1 , LP8764-Q1 , TPS6594-Q1

 

  1.   User's Guide for Powering DRA821 with TPS6594-Q1 and LP8764-Q1
  2.   Trademarks
  3. 1Introduction
  4. 2Device Versions
  5. 3Processor Connections
  6. 4Supporting Functional Safety Systems
    1. 4.1 Achieving ASIL-B System Requirements
    2. 4.2 Achieving up to ASIL-D System Requirements
  7. 5Static NVM Settings
    1. 5.1  Application-Based Configuration Settings
    2. 5.2  Device Identification Settings
    3. 5.3  BUCK Settings
    4. 5.4  LDO Settings
    5. 5.5  VCCA Settings
    6. 5.6  GPIO Settings
    7. 5.7  Finite State Machine (FSM) Settings
    8. 5.8  Interrupt Settings
    9. 5.9  POWERGOOD Settings
    10. 5.10 Miscellaneous Settings
    11. 5.11 Interface Settings
    12. 5.12 Multi-Device Settings
    13. 5.13 Watchdog Settings
  8. 6Pre-Configurable Finite State Machine (PFSM) Settings
    1. 6.1 Configured States
    2. 6.2 PFSM Triggers
    3. 6.3 Power Sequences
      1. 6.3.1 TO_SAFE_SEVERE
      2. 6.3.2 TO_SAFE_ORDERLY and TO_STANDBY
      3. 6.3.3 ACTIVE_TO_WARM
      4. 6.3.4 ESM_SOC_ERROR
      5. 6.3.5 PWR_SOC_ERROR
      6. 6.3.6 MCU_TO_WARM
      7. 6.3.7 TO_MCU
      8. 6.3.8 TO_ACTIVE
      9. 6.3.9 TO_RETENTION
  9. 7Application Examples
    1. 7.1 Moving Between States: ACTIVE, MCU, and RETENTION
      1. 7.1.1 ACTIVE
      2. 7.1.2 MCU ONLY
      3. 7.1.3 RETENTION
    2. 7.2 Entering and Exiting Standby
    3. 7.3 Entering and Existing LP_STANDBY
    4. 7.4 GPIO8 and Watchdog
  10. 8Additional Resources
  11. 9Revision History

5.6 GPIO Settings

These settings detail the default configurations of the GPIO rails. All these settings can be changed though I2C after startup. Note that the contents of the GPIOx_SEL field determine which other fields in the GPIOx_CONF and GPIO_OUT_x registers are applicable. To understand which NVM fields apply to each GPIOx_SEL option, see the Digital Signal Descriptions section in TPS6594-Q1 and LP8764-Q1 data sheets.

Table 5-7 GPIO NVM Settings
Register Name Field Name TPS6594141B-Q1 LP876441B1-Q1
Value Description Value Description
GPIO1_CONF GPIO1_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO1_DIR 0x0 Input 0x1 Output
GPIO1_SEL 0x1 SCL_I2C2/CS_SPI 0x0 GPIO1
GPIO1_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO1_PU_PD_EN 0x0 Disabled; Pull-up/pull-down resistor. 0x0 Disabled; Pull-up/pull-down resistor.
GPIO1_DEGLITCH_EN 0x0 No deglitch, only synchronization. 0x0 No deglitch, only synchronization.
GPIO2_CONF GPIO2_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO2_DIR 0x0 Input 0x0 Input
GPIO2_SEL 0x2 SDA_I2C2/SDO_SPI 0x0 GPIO2
GPIO2_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO2_PU_PD_EN 0x0 Disabled; Pull-up/pull-down resistor. 0x1 Enabled; Pull-up/pull-down resistor.
GPIO2_DEGLITCH_EN 0x0 No deglitch, only synchronization. 0x1 8 us deglitch time.
GPIO3_CONF GPIO3_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO3_DIR 0x0 Input 0x0 Input
GPIO3_SEL 0x2 NERR_SOC 0x0 GPIO3
GPIO3_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO3_PU_PD_EN 0x1 Enabled; Pull-up/pull-down resistor. 0x1 Enabled; Pull-up/pull-down resistor.
GPIO3_DEGLITCH_EN 0x1 8 us deglitch time. 0x1 8 us deglitch time.
GPIO4_CONF GPIO4_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO4_DIR 0x0 Input 0x0 Input
GPIO4_SEL 0x6 LP_WKUP1 0x0 GPIO4
GPIO4_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO4_PU_PD_EN 0x1 Enabled; Pull-up/pull-down resistor. 0x1 Enabled; Pull-up/pull-down resistor.
GPIO4_DEGLITCH_EN 0x1 8 us deglitch time. 0x1 8 us deglitch time.
GPIO5_CONF GPIO5_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO5_DIR 0x0 Input 0x0 Input
GPIO5_SEL 0x1 SCLK_SPMI 0x0 GPIO5
GPIO5_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO5_PU_PD_EN 0x1 Enabled; Pull-up/pull-down resistor. 0x1 Enabled; Pull-up/pull-down resistor.
GPIO5_DEGLITCH_EN 0x0 No deglitch, only synchronization. 0x1 8 us deglitch time.
GPIO6_CONF GPIO6_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO6_DIR 0x0 Input 0x0 Input
GPIO6_SEL 0x1 SDATA_SPMI 0x0 GPIO6
GPIO6_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO6_PU_PD_EN 0x1 Enabled; Pull-up/pull-down resistor. 0x1 Enabled; Pull-up/pull-down resistor.
GPIO6_DEGLITCH_EN 0x0 No deglitch, only synchronization. 0x1 8 us deglitch time.
GPIO7_CONF GPIO7_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO7_DIR 0x0 Input 0x1 Output
GPIO7_SEL 0x1 NERR_MCU 0x0 GPIO7
GPIO7_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO7_PU_PD_EN 0x1 Enabled; Pull-up/pull-down resistor. 0x0 Disabled; Pull-up/pull-down resistor.
GPIO7_DEGLITCH_EN 0x1 8 us deglitch time. 0x0 No deglitch, only synchronization.
GPIO8_CONF GPIO8_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO8_DIR 0x0 Input 0x0 Input
GPIO8_SEL 0x3 DISABLE_WDOG 0x1 SCLK_SPMI
GPIO8_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO8_PU_PD_EN 0x1 Enabled; Pull-up/pull-down resistor. 0x0 Disabled; Pull-up/pull-down resistor.
GPIO8_DEGLITCH_EN 0x1 8 us deglitch time. 0x0 No deglitch, only synchronization.
GPIO9_CONF GPIO9_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO9_DIR 0x1 Output 0x0 Input
GPIO9_SEL 0x0 GPIO9 0x1 SDATA_SPMI
GPIO9_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO9_PU_PD_EN 0x0 Disabled; Pull-up/pull-down resistor. 0x0 Disabled; Pull-up/pull-down resistor.
GPIO9_DEGLITCH_EN 0x0 No deglitch, only synchronization. 0x0 No deglitch, only synchronization.
GPIO10_CONF GPIO10_OD 0x0 Push-pull output 0x0 Push-pull output
GPIO10_DIR 0x0 Input 0x1 Output
GPIO10_SEL 0x0 GPIO10 0x0 GPIO10
GPIO10_PU_SEL 0x0 Pull-down resistor selected 0x0 Pull-down resistor selected
GPIO10_PU_PD_EN 0x1 Enabled; Pull-up/pull-down resistor. 0x0 Disabled; Pull-up/pull-down resistor.
GPIO10_DEGLITCH_EN 0x1 8 us deglitch time. 0x0 No deglitch, only synchronization.
GPIO11_CONF GPIO11_OD 0x1 Open-drain output
GPIO11_DIR 0x1 Output
GPIO11_SEL 0x2 NRSTOUT_SOC
GPIO11_PU_SEL 0x0 Pull-down resistor selected
GPIO11_PU_PD_EN 0x0 Disabled; Pull-up/pull-down resistor.
GPIO11_DEGLITCH_EN 0x0 No deglitch, only synchronization.
NPWRON_CONF NPWRON_SEL 0x0 ENABLE
ENABLE_PU_SEL 0x0 Pull-down resistor selected
ENABLE_PU_PD_EN 0x1 Enabled; Pull-up/pull-down resistor.
ENABLE_DEGLITCH_EN 0x1 8 us deglitch time when ENABLE, 50 ms deglitch time when NPWRON.
ENABLE_POL 0x0 Active high 0x0 Active high
NRSTOUT_OD 0x1 Open-drain output
GPIO_OUT_1 GPIO1_OUT(1) 0x0 Low 0x0 Low
GPIO2_OUT(1) 0x0 Low 0x0 Low
GPIO3_OUT(1) 0x0 Low 0x0 Low
GPIO4_OUT(1) 0x0 Low 0x0 Low
GPIO5_OUT(1) 0x0 Low 0x0 Low
GPIO6_OUT(1) 0x0 Low 0x0 Low
GPIO7_OUT(1) 0x0 Low 0x0 Low
GPIO8_OUT(1) 0x0 Low 0x0 Low
GPIO_OUT_2 GPIO9_OUT(1) 0x0 Low 0x0 Low
GPIO10_OUT(1) 0x0 Low 0x0 Low
GPIO11_OUT(1) 0x0 Low
(1) Note that this NVM default value can change when the device transitions to ACTIVE mode.
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