SLVUC11 April   2021 DP83561-SP

 

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SEFI Support Monitoring

The DP83561-SP offers a SEFI monitoring suite, monitoring the IEEE PCS state machine, ECC configuration register, supply current, PLL lock, and on-chip temperature. When Auto-Recovery is enabled, the device will automatically reset the PHY when a SEFI is detected. Please refer to the device datasheet for detailed descriptions of each function. This section describes how to observe each interrupt using the DP83561EVM. The DP83561EVM has hooks to observe the following SEFI events:

  • IEEE PCS State Machine Monitor
    • If any invalid state changes are made, the DP83561 will indicate a SEFI has occurred and raise the INT_STTMCHNE_N signal.
    • The INT_STTMCHNE_N signal can be observed on the INT_STTMCHNE_N pin of J8.
  • ECC Configuration Register Monitor
    • If any change in the configuration registers are detected or corrected by the ECC, an interrupt on the INT_CHECKSUM_N signal will be raised for indication to the higher level system.
    • The INT_CHECKSUM_N signal can be observed on the INT_CHECKSUM_N pin of J8.
  • Supply Current Monitor
    • When supply current changes exceed the expected normal operating conditions, the INT_SUP_CUR_N signal will be asserted.
    • The INT_SUP_CUR_N signal can be observed on the INT_SUP_CUR_N pin of J8.
  • Temperature Monitor

    • The DP83561-SP has an on chip temperture monitor. The value measured by the sensor can be read using the following steps:

      • Write value 0xCD24 to register 0x01E8

      • Read measured value off of register 0x01EA

GUID-20201104-CA0I-G4H7-QLVS-KCS66MW0GJP0-low.gifFigure 6-1 DP83561EVM SEFI Interrupt Pins

Note: To use the pins INT_SUP_CUR_N, INT_ECC_N, and INT_STTMCHNE_N as an interrupt, they must be pulled up to VDDIO through use of an external 2.2k pull-up resistor. The resistors R42, R43, and R44 respectively may be replaced with a 2.2k resistor and connected to VDDIO. VDDIO can be accessed via pins 2, 4, and 6 of header P2.