SLVUC93 September   2021 TPSM63606

 

  1.   Trademarks
  2. 1High-Density EVM Description
    1. 1.1 Typical Applications
    2. 1.2 Features and Electrical Performance
  3. 2EVM Performance Specifications
  4. 3EVM Photo
  5. 4Test Setup and Procedure
    1. 4.1 EVM Connections
    2. 4.2 EVM Setup
    3. 4.3 Test Equipment
    4. 4.4 Recommended Test Setup
      1. 4.4.1 Input Connections
      2. 4.4.2 Output Connections
    5. 4.5 Test Procedure
      1. 4.5.1 Line/Load Regulation and Efficiency
  6. 5Test Data and Performance Curves
    1. 5.1 Efficiency and Load Regulation Performance
    2. 5.2 Waveforms
    3. 5.3 Bode Plot
    4. 5.4 Thermal Performance
    5. 5.5 EMI Performance
  7. 6EVM Documentation
    1. 6.1 Schematic
    2. 6.2 Bill of Materials
    3. 6.3 PCB Layout
    4. 6.4 Assembly Drawings
    5. 6.5 Multi-Layer Stackup
  8. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
        1. 7.1.1.1 Custom Design With WEBENCH® Tools
    2. 7.2 Documentation Support
      1. 7.2.1 Related Documentation

3 EVM Photo

Figure 3-1 highlights the buck module power stage and the various connection interfaces associated with the EVM. Use terminal blocks J1 and J2 to connect the input supply and load, respectively. These terminal blocks accept up to 16-AWG wire thickness.

Figure 3-1 TPSM63606(S) EVM Photo
GUID-B5F70B40-D946-48A4-8F46-18A24BA14C02-low.gif
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