SLVUCL1A March 2023 – March 2023 TPS65219
This section describes the settings that are masked by default and the effect they have on the device state as well as the nINT pin.
Register Name | Field Name | Value | Description | |
---|---|---|---|---|
Mask effects on device state and nINT pin | MASK_CONFIG | MASK_EFFECT | 0x03 | no state change, nINT reaction, bit set for Faults |
UV Mask | INT_MASK_UV | BUCK1_UV_MASK | 0x0 | un-masked (Faults reported) |
INT_MASK_UV | BUCK2_UV_MASK | 0x0 | un-masked (Faults reported) | |
INT_MASK_UV | BUCK3_UV_MASK | 0x0 | un-masked (Faults reported) | |
INT_MASK_UV | LDO1_UV_MASK | 0x0 | un-masked (Faults reported) | |
INT_MASK_UV | LDO2_UV_MASK | 0x0 | un-masked (Faults reported) | |
INT_MASK_UV | LDO3_UV_MASK | 0x0 | un-masked (Faults reported) | |
INT_MASK_UV | LDO4_UV_MASK | 0x0 | un-masked (Faults reported) | |
Power-up retries/attempts | INT_MASK_UV | MASK_RETRY_COUNT | 0x0 | Device does retry up to 2 times, then stay off |
Die Temperature | MASK_CONFIG | SENSOR_0_WARM_MASK | 0x0 | un-masked (Faults reported) |
MASK_CONFIG | SENSOR_1_WARM_MASK | 0x0 | un-masked (Faults reported) | |
MASK_CONFIG | SENSOR_2_WARM_MASK | 0x0 | un-masked (Faults reported) | |
MASK_CONFIG | SENSOR_3_WARM_MASK | 0x0 | un-masked (Faults reported) | |
Masking bit to control whether nINT pin is sensitive to PushButton (PB) | MASK_CONFIG | MASK_INT_FOR_PB | 0x1 | masked (nINT not sensitive to any PB events) |
Masking bit to control whether nINT pin is sensitive to RV (Residual Voltage) | MASK_CONFIG | MASK_INT_FOR_RV | 0x0 | un-masked (nINT pulled low for any RV events during transition to ACTIVE state or during enabling of rails) |