SLVUCL1A March 2023 – March 2023 TPS65219
This section describes the default settings for the over current deglitch. When any of these registers are set (value = 1b), it enabled the long-deglitch option for the corresponding rail.
| Register Name | Field Name | Value | Description |
|---|---|---|---|
| OC_DEGL_CONFIG | EN_LONG_DEGL_FOR_OC_BUCK1 | 0x0 | Deglitch duration for OverCurrent signals for BUCK1 (High-Side Overcurrent, Low-Side Overcurrent and Low-Side Reverse/Negative OverCurrent) is ~20us |
| OC_DEGL_CONFIG | EN_LONG_DEGL_FOR_OC_BUCK2 | 0x0 | Deglitch duration for OverCurrent signals for BUCK2 (High-Side Overcurrent, Low-Side Overcurrent and Low-Side Reverse/Negative OverCurrent) is ~20us |
| OC_DEGL_CONFIG | EN_LONG_DEGL_FOR_OC_BUCK3 | 0x0 | Deglitch duration for OverCurrent signals for BUCK3 (High-Side Overcurrent, Low-Side Overcurrent and Low-Side Reverse/Negative OverCurrent) is ~20us |
| OC_DEGL_CONFIG | EN_LONG_DEGL_FOR_OC_LDO1 | 0x0 | Deglitch duration for OverCurrent signals of LDO1 is ~20us |
| OC_DEGL_CONFIG | EN_LONG_DEGL_FOR_OC_LDO2 | 0x0 | Deglitch duration for OverCurrent signals of LDO2 is ~20us |
| OC_DEGL_CONFIG | EN_LONG_DEGL_FOR_OC_LDO3 | 0x0 | Deglitch duration for OverCurrent signals of LDO3 is ~20us |
| OC_DEGL_CONFIG | EN_LONG_DEGL_FOR_OC_LDO4 | 0x0 | Deglitch duration for OverCurrent signals of LDO4 is ~20us |