SLVUCM1
December 2022
TPS552892
TPS552892EVM-111 Evaluation Module
Trademarks
1
Introduction
1.1
Performance Specification
1.2
Modification
2
Connector, Test Point and Jumper Descriptions
2.1
Connector and Test Point Descriptions
2.2
Jumper Configuration
2.2.1
JP1 (ENABLE)
2.2.2
JP5(SYNC)
2.2.3
JP6 (MODE)
2.2.4
JP7 (EXTVCC)
3
Test Procedure
4
Schematic, Bill of Materials, and Board Layout
4.1
Schematic
4.2
Bill of Materials
4.3
Board Layout
4.3
Board Layout
Figure 4-2
through
Figure 4-5
illustrate the EVM board layouts.
Figure 4-2
TPS552892EVM-111 Top-Side Layout
Figure 4-3
TPS552892EVM-111 Inner Layer1
Figure 4-4
TPS552892EVM-111 Inner Layer2
Figure 4-5
TPS552892EVM-111 Bottom-Side Layout
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