SLVUCZ4 September 2024 TPS65219
This section describes the settings that are masked by default and the effect they have on the device state as well as the nINT pin.
Register Address | Field Name | Value | Description | |
---|---|---|---|---|
Mask effects on device state and nINT pin | 0x25 | MASK_EFFECT | 0x03 | no state change, nINT reaction, bit set for Faults |
UV Mask | 0x24 | BUCK1_UV_MASK | 0x0 | un-masked (Faults reported) |
0x24 | BUCK2_UV_MASK | 0x0 | un-masked (Faults reported) | |
0x24 | BUCK3_UV_MASK | 0x0 | un-masked (Faults reported) | |
0x24 | LDO1_UV_MASK | 0x0 | un-masked (Faults reported) | |
0x24 | LDO2_UV_MASK | 0x0 | un-masked (Faults reported) | |
0x24 | LDO3_UV_MASK | 0x0 | un-masked (Faults reported) | |
0x24 | LDO4_UV_MASK | 0x0 | un-masked (Faults reported) | |
Power-up retries/attempts | 0x24 | MASK_RETRY_COUNT | 0x0 | Device retries up to 2 times |
Die Temperature | 0x25 | SENSOR_0_WARM_MASK | 0x0 | un-masked (Faults reported) |
0x25 | SENSOR_1_WARM_MASK | 0x0 | un-masked (Faults reported) | |
0x25 | SENSOR_2_WARM_MASK | 0x0 | un-masked (Faults reported) | |
0x25 | SENSOR_3_WARM_MASK | 0x0 | un-masked (Faults reported) | |
Masking bit to control whether nINT pin is sensitive to PushButton (PB) | 0x25 | MASK_INT_FOR_PB | 0x1 | masked (nINT pin not sensitive to any PB events) |
Masking bit to control whether nINT pin is sensitive to RV (Residual Voltage) | 0x25 | MASK_INT_FOR_RV | 0x0 | un-masked (nINT pin pulled low for any RV events during transition to ACTIVE state or during enabling of rails) |